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Unified Diff: src/x64/disasm-x64.cc

Issue 164399: X64: Add an SHL optimization, fix a floating-point bug, fix xchg rax,r8 and p... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 11 years, 4 months ago
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Index: src/x64/disasm-x64.cc
===================================================================
--- src/x64/disasm-x64.cc (revision 2669)
+++ src/x64/disasm-x64.cc (working copy)
@@ -105,7 +105,6 @@
static ByteMnemonic zero_operands_instr[] = {
{ 0xC3, UNSET_OP_ORDER, "ret" },
{ 0xC9, UNSET_OP_ORDER, "leave" },
- { 0x90, UNSET_OP_ORDER, "nop" },
Erik Corry 2009/08/12 20:03:37 Was this deliberate?
William Hesse 2009/08/13 07:59:36 Yes. This instruction is handled by code, because
{ 0xF4, UNSET_OP_ORDER, "hlt" },
{ 0xCC, UNSET_OP_ORDER, "int3" },
{ 0x60, UNSET_OP_ORDER, "pushad" },
@@ -1425,7 +1424,7 @@
default:
UNREACHABLE();
}
- AppendToBuffer("test%c rax,0x%"V8_PTR_PREFIX"ux",
+ AppendToBuffer("test%c rax,0x%"V8_PTR_PREFIX"x",
operand_size_code(),
value);
break;
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