Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(191)

Side by Side Diff: src/x64/disasm-x64.cc

Issue 1631008: Optimize the assembly code generated for Math.random() (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/x64/codegen-x64.cc ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 979 matching lines...) Expand 10 before | Expand all | Expand 10 after
990 // We do not use any three-byte opcodes, which start with 0x0F38 or 0x0F3A. 990 // We do not use any three-byte opcodes, which start with 0x0F38 or 0x0F3A.
991 int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { 991 int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
992 byte opcode = *(data + 1); 992 byte opcode = *(data + 1);
993 byte* current = data + 2; 993 byte* current = data + 2;
994 // At return, "current" points to the start of the next instruction. 994 // At return, "current" points to the start of the next instruction.
995 const char* mnemonic = TwoByteMnemonic(opcode); 995 const char* mnemonic = TwoByteMnemonic(opcode);
996 if (operand_size_ == 0x66) { 996 if (operand_size_ == 0x66) {
997 // 0x66 0x0F prefix. 997 // 0x66 0x0F prefix.
998 int mod, regop, rm; 998 int mod, regop, rm;
999 get_modrm(*current, &mod, &regop, &rm); 999 get_modrm(*current, &mod, &regop, &rm);
1000 const char* mnemonic = "?"; 1000 if (opcode == 0x6E) {
1001 if (opcode == 0x57) { 1001 AppendToBuffer("movd %s,", NameOfXMMRegister(regop));
1002 mnemonic = "xorpd"; 1002 current += PrintRightOperand(current);
1003 } else if (opcode == 0x2E) {
1004 mnemonic = "comisd";
1005 } else if (opcode == 0x2F) {
1006 mnemonic = "ucomisd";
1007 } else { 1003 } else {
1008 UnimplementedInstruction(); 1004 const char* mnemonic = "?";
1005 if (opcode == 0x57) {
1006 mnemonic = "xorpd";
1007 } else if (opcode == 0x2E) {
1008 mnemonic = "comisd";
1009 } else if (opcode == 0x2F) {
1010 mnemonic = "ucomisd";
1011 } else {
1012 UnimplementedInstruction();
1013 }
1014 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
1015 current += PrintRightXMMOperand(current);
1009 } 1016 }
1010 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
1011 current += PrintRightXMMOperand(current);
1012 } else if (group_1_prefix_ == 0xF2) { 1017 } else if (group_1_prefix_ == 0xF2) {
1013 // Beginning of instructions with prefix 0xF2. 1018 // Beginning of instructions with prefix 0xF2.
1014 1019
1015 if (opcode == 0x11 || opcode == 0x10) { 1020 if (opcode == 0x11 || opcode == 0x10) {
1016 // MOVSD: Move scalar double-precision fp to/from/between XMM registers. 1021 // MOVSD: Move scalar double-precision fp to/from/between XMM registers.
1017 AppendToBuffer("movsd "); 1022 AppendToBuffer("movsd ");
1018 int mod, regop, rm; 1023 int mod, regop, rm;
1019 get_modrm(*current, &mod, &regop, &rm); 1024 get_modrm(*current, &mod, &regop, &rm);
1020 if (opcode == 0x11) { 1025 if (opcode == 0x11) {
1021 current += PrintRightOperand(current); 1026 current += PrintRightOperand(current);
(...skipping 10 matching lines...) Expand all
1032 current += PrintRightOperand(current); 1037 current += PrintRightOperand(current);
1033 } else if ((opcode & 0xF8) == 0x58) { 1038 } else if ((opcode & 0xF8) == 0x58) {
1034 // XMM arithmetic. Mnemonic was retrieved at the start of this function. 1039 // XMM arithmetic. Mnemonic was retrieved at the start of this function.
1035 int mod, regop, rm; 1040 int mod, regop, rm;
1036 get_modrm(*current, &mod, &regop, &rm); 1041 get_modrm(*current, &mod, &regop, &rm);
1037 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop)); 1042 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
1038 current += PrintRightXMMOperand(current); 1043 current += PrintRightXMMOperand(current);
1039 } else { 1044 } else {
1040 UnimplementedInstruction(); 1045 UnimplementedInstruction();
1041 } 1046 }
1042 } else if (opcode == 0x2C && group_1_prefix_ == 0xF3) { 1047 } else if (group_1_prefix_ == 0xF3) {
1043 // Instruction with prefix 0xF3. 1048 // Instructions with prefix 0xF3.
1044 1049 if (opcode == 0x2C) {
1045 // CVTTSS2SI: Convert scalar single-precision FP to dword integer. 1050 // CVTTSS2SI: Convert scalar single-precision FP to dword integer.
1046 // Assert that mod is not 3, so source is memory, not an XMM register. 1051 // Assert that mod is not 3, so source is memory, not an XMM register.
1047 ASSERT_NE(0xC0, *current & 0xC0); 1052 ASSERT_NE(0xC0, *current & 0xC0);
1048 current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current); 1053 current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
1054 } else if (opcode == 0x5A) {
1055 int mod, regop, rm;
1056 get_modrm(*current, &mod, &regop, &rm);
1057 AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop));
1058 current += PrintRightXMMOperand(current);
1059 } else {
1060 UnimplementedInstruction();
1061 }
1049 } else if (opcode == 0x1F) { 1062 } else if (opcode == 0x1F) {
1050 // NOP 1063 // NOP
1051 int mod, regop, rm; 1064 int mod, regop, rm;
1052 get_modrm(*current, &mod, &regop, &rm); 1065 get_modrm(*current, &mod, &regop, &rm);
1053 current++; 1066 current++;
1054 if (regop == 4) { // SIB byte present. 1067 if (regop == 4) { // SIB byte present.
1055 current++; 1068 current++;
1056 } 1069 }
1057 if (mod == 1) { // Byte displacement. 1070 if (mod == 1) { // Byte displacement.
1058 current += 1; 1071 current += 1;
(...skipping 569 matching lines...) Expand 10 before | Expand all | Expand 10 after
1628 fprintf(f, "%02x", *bp); 1641 fprintf(f, "%02x", *bp);
1629 } 1642 }
1630 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { 1643 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
1631 fprintf(f, " "); 1644 fprintf(f, " ");
1632 } 1645 }
1633 fprintf(f, " %s\n", buffer.start()); 1646 fprintf(f, " %s\n", buffer.start());
1634 } 1647 }
1635 } 1648 }
1636 1649
1637 } // namespace disasm 1650 } // namespace disasm
OLDNEW
« no previous file with comments | « src/x64/codegen-x64.cc ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698