Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(11)

Side by Side Diff: src/arm/simulator-arm.cc

Issue 1606019: Make binary op stubs in both r0-r1 and r1-r0 versions to reduce... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« src/arm/codegen-arm.cc ('K') | « src/arm/full-codegen-arm.cc ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1794 matching lines...) Expand 10 before | Expand all | Expand 10 after
1805 } 1805 }
1806 case 2: { 1806 case 2: {
1807 // Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w"); 1807 // Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
1808 addr = rn_val - shifter_operand; 1808 addr = rn_val - shifter_operand;
1809 if (instr->HasW()) { 1809 if (instr->HasW()) {
1810 set_register(rn, addr); 1810 set_register(rn, addr);
1811 } 1811 }
1812 break; 1812 break;
1813 } 1813 }
1814 case 3: { 1814 case 3: {
1815 // UBFX.
1815 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) { 1816 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
1816 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16)); 1817 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
1817 uint32_t lsbit = static_cast<uint32_t>(instr->ShiftAmountField()); 1818 uint32_t lsbit = static_cast<uint32_t>(instr->ShiftAmountField());
1818 uint32_t msbit = widthminus1 + lsbit; 1819 uint32_t msbit = widthminus1 + lsbit;
1819 if (msbit <= 31) { 1820 if (msbit <= 31) {
1820 uint32_t rm_val = 1821 uint32_t rm_val =
1821 static_cast<uint32_t>(get_register(instr->RmField())); 1822 static_cast<uint32_t>(get_register(instr->RmField()));
1822 uint32_t extr_val = rm_val << (31 - msbit); 1823 uint32_t extr_val = rm_val << (31 - msbit);
1823 extr_val = extr_val >> (31 - widthminus1); 1824 extr_val = extr_val >> (31 - widthminus1);
1824 set_register(instr->RdField(), extr_val); 1825 set_register(instr->RdField(), extr_val);
(...skipping 652 matching lines...) Expand 10 before | Expand all | Expand 10 after
2477 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); 2478 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
2478 uintptr_t address = *stack_slot; 2479 uintptr_t address = *stack_slot;
2479 set_register(sp, current_sp + sizeof(uintptr_t)); 2480 set_register(sp, current_sp + sizeof(uintptr_t));
2480 return address; 2481 return address;
2481 } 2482 }
2482 2483
2483 2484
2484 } } // namespace assembler::arm 2485 } } // namespace assembler::arm
2485 2486
2486 #endif // !defined(__arm__) 2487 #endif // !defined(__arm__)
OLDNEW
« src/arm/codegen-arm.cc ('K') | « src/arm/full-codegen-arm.cc ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698