Basic infrastructure for fast two-pass compilation. A CFG is...

src/arm/cfg-arm.cc

Index: src/arm/cfg-arm.cc
===================================================================
--- src/arm/cfg-arm.cc	(revision 0)
+++ src/arm/cfg-arm.cc	(revision 0)
@@ -0,0 +1,97 @@
+// Copyright 2009 the V8 project authors. All rights reserved.
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+//       notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+//       copyright notice, this list of conditions and the following
+//       disclaimer in the documentation and/or other materials provided
+//       with the distribution.
+//     * Neither the name of Google Inc. nor the names of its
+//       contributors may be used to endorse or promote products derived
+//       from this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#include "v8.h"
+
+#include "cfg.h"
+#include "codegen-inl.h"
+#include "macro-assembler-arm.h"
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm)
+
+void InstructionBlock::Compile(MacroAssembler* masm) {
+  ASSERT(!is_marked());
+  is_marked_ = true;
+  {
+    Comment cmt(masm, "[ InstructionBlock");
+    for (int i = 0, len = instructions_.length(); i < len; i++) {
+      instructions_[i]->Compile(masm);
+    }
+  }
+  successor_->Compile(masm);
+}
+
+
+void EntryNode::Compile(MacroAssembler* masm) {
+  ASSERT(!is_marked());
+  is_marked_ = true;
+  {
+    Comment cmnt(masm, "[ EntryNode");
+    __ stm(db_w, sp, r1.bit() | cp.bit() | fp.bit() | lr.bit());
+    __ add(fp, sp, Operand(2 * kPointerSize));
+    if (local_count_ > 0) {
+      __ mov(ip, Operand(Factory::undefined_value()));
+      for (int i = 0; i < local_count_; i++) {
+        __ push(ip);
+      }
+    }
+    if (FLAG_check_stack) {
+      StackCheckStub stub;
+      __ CallStub(&stub);
+    }
+  }
+  successor_->Compile(masm);
+}
+
+
+void ExitNode::Compile(MacroAssembler* masm) {
+  ASSERT(!is_marked());
+  is_marked_ = true;
+  Comment cmnt(masm, "[ ExitNode");
+  __ mov(sp, fp);
+  __ ldm(ia_w, sp, fp.bit() | lr.bit());
+  __ add(sp, sp, Operand((parameter_count_ + 1) * kPointerSize));
+  __ Jump(lr);
+}
+
+
+void ReturnInstr::Compile(MacroAssembler* masm) {
+  Comment cmnt(masm, "[ ReturnInstr");
+  value_->ToRegister(masm, r0);
+}
+
+
+void Constant::ToRegister(MacroAssembler* masm, Register reg) {
+  __ mov(reg, Operand(handle_));
+}
+
+#undef __
+
+} }  // namespace v8::internal