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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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625 immediate_arithmetic_op(0x4, dst, src); | 625 immediate_arithmetic_op(0x4, dst, src); |
626 } | 626 } |
627 | 627 |
628 void decq(Register dst); | 628 void decq(Register dst); |
629 void decq(const Operand& dst); | 629 void decq(const Operand& dst); |
630 void decl(Register dst); | 630 void decl(Register dst); |
631 void decl(const Operand& dst); | 631 void decl(const Operand& dst); |
632 | 632 |
633 // Sign-extends rax into rdx:rax. | 633 // Sign-extends rax into rdx:rax. |
634 void cqo(); | 634 void cqo(); |
| 635 // Sign-extends eax into edx:eax. |
| 636 void cdq(); |
635 | 637 |
636 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. | 638 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. |
637 void idiv(Register src); | 639 void idivq(Register src); |
| 640 // Divide edx:eax by lower 32 bits of src. Quotient in eax, rem. in edx. |
| 641 void idivl(Register src); |
638 | 642 |
639 // Signed multiply instructions. | 643 // Signed multiply instructions. |
640 void imul(Register src); // rdx:rax = rax * src. | 644 void imul(Register src); // rdx:rax = rax * src. |
641 void imul(Register dst, Register src); // dst = dst * src. | 645 void imul(Register dst, Register src); // dst = dst * src. |
642 void imul(Register dst, const Operand& src); // dst = dst * src. | 646 void imul(Register dst, const Operand& src); // dst = dst * src. |
643 void imul(Register dst, Register src, Immediate imm); // dst = src * imm. | 647 void imul(Register dst, Register src, Immediate imm); // dst = src * imm. |
644 // Multiply 32 bit registers | 648 // Multiply 32 bit registers |
645 void imull(Register dst, Register src); // dst = dst * src. | 649 void imull(Register dst, Register src); // dst = dst * src. |
646 | 650 |
647 void incq(Register dst); | 651 void incq(Register dst); |
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1211 private: | 1215 private: |
1212 Assembler* assembler_; | 1216 Assembler* assembler_; |
1213 #ifdef DEBUG | 1217 #ifdef DEBUG |
1214 int space_before_; | 1218 int space_before_; |
1215 #endif | 1219 #endif |
1216 }; | 1220 }; |
1217 | 1221 |
1218 } } // namespace v8::internal | 1222 } } // namespace v8::internal |
1219 | 1223 |
1220 #endif // V8_X64_ASSEMBLER_X64_H_ | 1224 #endif // V8_X64_ASSEMBLER_X64_H_ |
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