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Side by Side Diff: base/atomicops.h

Issue 159428: Some base/ progress towards building on Linux x86-64. (Closed)
Patch Set: merge Created 11 years, 5 months ago
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1 // Copyright (c) 2006-2008 The Chromium Authors. All rights reserved. 1 // Copyright (c) 2006-2008 The Chromium Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // For atomic operations on reference counts, see atomic_refcount.h. 5 // For atomic operations on reference counts, see atomic_refcount.h.
6 // For atomic operations on sequence numbers, see atomic_sequence_num.h. 6 // For atomic operations on sequence numbers, see atomic_sequence_num.h.
7 7
8 // The routines exported by this module are subtle. If you use them, even if 8 // The routines exported by this module are subtle. If you use them, even if
9 // you get the code right, it will depend on careful reasoning about atomicity 9 // you get the code right, it will depend on careful reasoning about atomicity
10 // and memory ordering; it will be less readable, and harder to maintain. If 10 // and memory ordering; it will be less readable, and harder to maintain. If
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32 #include "base/port.h" 32 #include "base/port.h"
33 33
34 namespace base { 34 namespace base {
35 namespace subtle { 35 namespace subtle {
36 36
37 // Bug 1308991. We need this for /Wp64, to mark it safe for AtomicWord casting. 37 // Bug 1308991. We need this for /Wp64, to mark it safe for AtomicWord casting.
38 #ifndef OS_WIN 38 #ifndef OS_WIN
39 #define __w64 39 #define __w64
40 #endif 40 #endif
41 typedef __w64 int32 Atomic32; 41 typedef __w64 int32 Atomic32;
42 #ifdef CPU_ARCH_64_BITS 42 #ifdef ARCH_CPU_64_BITS
43 typedef int64 Atomic64; 43 // We need to be able to go between Atomic64 and AtomicWord implicitly. This
44 // means Atomic64 and AtomicWord should be the same type on 64-bit.
45 typedef intptr_t Atomic64;
44 #endif 46 #endif
45 47
46 // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or 48 // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or
47 // Atomic64 routines below, depending on your architecture. 49 // Atomic64 routines below, depending on your architecture.
48 typedef intptr_t AtomicWord; 50 typedef intptr_t AtomicWord;
49 51
50 // Atomically execute: 52 // Atomically execute:
51 // result = *ptr; 53 // result = *ptr;
52 // if (*ptr == old_value) 54 // if (*ptr == old_value)
53 // *ptr = new_value; 55 // *ptr = new_value;
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
91 void MemoryBarrier(); 93 void MemoryBarrier();
92 void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value); 94 void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value);
93 void Acquire_Store(volatile Atomic32* ptr, Atomic32 value); 95 void Acquire_Store(volatile Atomic32* ptr, Atomic32 value);
94 void Release_Store(volatile Atomic32* ptr, Atomic32 value); 96 void Release_Store(volatile Atomic32* ptr, Atomic32 value);
95 97
96 Atomic32 NoBarrier_Load(volatile const Atomic32* ptr); 98 Atomic32 NoBarrier_Load(volatile const Atomic32* ptr);
97 Atomic32 Acquire_Load(volatile const Atomic32* ptr); 99 Atomic32 Acquire_Load(volatile const Atomic32* ptr);
98 Atomic32 Release_Load(volatile const Atomic32* ptr); 100 Atomic32 Release_Load(volatile const Atomic32* ptr);
99 101
100 // 64-bit atomic operations (only available on 64-bit processors). 102 // 64-bit atomic operations (only available on 64-bit processors).
101 #ifdef CPU_ARCH_64_BITS 103 #ifdef ARCH_CPU_64_BITS
102 Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, 104 Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
103 Atomic64 old_value, 105 Atomic64 old_value,
104 Atomic64 new_value); 106 Atomic64 new_value);
105 Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value); 107 Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value);
106 Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); 108 Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
107 Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); 109 Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
108 110
109 Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, 111 Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
110 Atomic64 old_value, 112 Atomic64 old_value,
111 Atomic64 new_value); 113 Atomic64 new_value);
112 Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, 114 Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
113 Atomic64 old_value, 115 Atomic64 old_value,
114 Atomic64 new_value); 116 Atomic64 new_value);
115 void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value); 117 void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value);
116 void Acquire_Store(volatile Atomic64* ptr, Atomic64 value); 118 void Acquire_Store(volatile Atomic64* ptr, Atomic64 value);
117 void Release_Store(volatile Atomic64* ptr, Atomic64 value); 119 void Release_Store(volatile Atomic64* ptr, Atomic64 value);
118 Atomic64 NoBarrier_Load(volatile const Atomic64* ptr); 120 Atomic64 NoBarrier_Load(volatile const Atomic64* ptr);
119 Atomic64 Acquire_Load(volatile const Atomic64* ptr); 121 Atomic64 Acquire_Load(volatile const Atomic64* ptr);
120 Atomic64 Release_Load(volatile const Atomic64* ptr); 122 Atomic64 Release_Load(volatile const Atomic64* ptr);
121 #endif // CPU_ARCH_64_BITS 123 #endif // ARCH_CPU_64_BITS
122 124
123 } // namespace base::subtle 125 } // namespace base::subtle
124 } // namespace base 126 } // namespace base
125 127
126 // Include our platform specific implementation. 128 // Include our platform specific implementation.
127 #if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY) 129 #if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY)
128 #include "base/atomicops_internals_x86_msvc.h" 130 #include "base/atomicops_internals_x86_msvc.h"
129 #elif defined(OS_MACOSX) && defined(ARCH_CPU_X86_FAMILY) 131 #elif defined(OS_MACOSX) && defined(ARCH_CPU_X86_FAMILY)
130 #include "base/atomicops_internals_x86_macosx.h" 132 #include "base/atomicops_internals_x86_macosx.h"
131 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY) 133 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY)
132 #include "base/atomicops_internals_x86_gcc.h" 134 #include "base/atomicops_internals_x86_gcc.h"
133 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY) 135 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY)
134 #include "base/atomicops_internals_arm_gcc.h" 136 #include "base/atomicops_internals_arm_gcc.h"
135 #else 137 #else
136 #error "Atomic operations are not supported on your platform" 138 #error "Atomic operations are not supported on your platform"
137 #endif 139 #endif
138 140
139 #endif // BASE_ATOMICOPS_H_ 141 #endif // BASE_ATOMICOPS_H_
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