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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1458 } | 1458 } |
1459 } else { | 1459 } else { |
1460 // signed byte loads | 1460 // signed byte loads |
1461 ASSERT(instr->HasSign()); | 1461 ASSERT(instr->HasSign()); |
1462 ASSERT(instr->HasL()); | 1462 ASSERT(instr->HasL()); |
1463 int8_t val = ReadB(addr); | 1463 int8_t val = ReadB(addr); |
1464 set_register(rd, val); | 1464 set_register(rd, val); |
1465 } | 1465 } |
1466 return; | 1466 return; |
1467 } | 1467 } |
1468 } else if ((type == 0) && instr->IsMiscType0()) { | |
1469 if (instr->Bits(22, 21) == 1) { | |
1470 int rm = instr->RmField(); | |
1471 switch (instr->Bits(7, 4)) { | |
1472 case BX: | |
1473 set_pc(get_register(rm)); | |
1474 break; | |
1475 case BLX: { | |
1476 uint32_t old_pc = get_pc(); | |
1477 set_pc(get_register(rm)); | |
1478 set_register(lr, old_pc + Instr::kInstrSize); | |
1479 break; | |
1480 } | |
1481 case BKPT: | |
1482 v8::internal::OS::DebugBreak(); | |
1483 break; | |
1484 default: | |
1485 UNIMPLEMENTED(); | |
1486 } | |
1487 } else if (instr->Bits(22, 21) == 3) { | |
1488 int rm = instr->RmField(); | |
1489 int rd = instr->RdField(); | |
1490 switch (instr->Bits(7, 4)) { | |
1491 case CLZ: { | |
1492 uint32_t bits = get_register(rm); | |
1493 int leading_zeros = 0; | |
1494 if (bits == 0) { | |
1495 leading_zeros = 32; | |
1496 } else { | |
1497 while ((bits & 0x80000000u) == 0) { | |
1498 bits <<= 1; | |
1499 leading_zeros++; | |
1500 } | |
1501 } | |
1502 set_register(rd, leading_zeros); | |
1503 break; | |
1504 } | |
1505 default: | |
1506 UNIMPLEMENTED(); | |
1507 } | |
1508 } else { | |
1509 PrintF("%08x\n", instr->InstructionBits()); | |
1510 UNIMPLEMENTED(); | |
1511 } | |
1468 } else { | 1512 } else { |
1469 int rd = instr->RdField(); | 1513 int rd = instr->RdField(); |
1470 int rn = instr->RnField(); | 1514 int rn = instr->RnField(); |
1471 int32_t rn_val = get_register(rn); | 1515 int32_t rn_val = get_register(rn); |
1472 int32_t shifter_operand = 0; | 1516 int32_t shifter_operand = 0; |
1473 bool shifter_carry_out = 0; | 1517 bool shifter_carry_out = 0; |
1474 if (type == 0) { | 1518 if (type == 0) { |
1475 shifter_operand = GetShiftRm(instr, &shifter_carry_out); | 1519 shifter_operand = GetShiftRm(instr, &shifter_carry_out); |
1476 } else { | 1520 } else { |
1477 ASSERT(instr->TypeField() == 1); | 1521 ASSERT(instr->TypeField() == 1); |
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1575 } | 1619 } |
1576 | 1620 |
1577 case TEQ: { | 1621 case TEQ: { |
1578 if (instr->HasS()) { | 1622 if (instr->HasS()) { |
1579 // Format(instr, "teq'cond 'rn, 'shift_rm"); | 1623 // Format(instr, "teq'cond 'rn, 'shift_rm"); |
1580 // Format(instr, "teq'cond 'rn, 'imm"); | 1624 // Format(instr, "teq'cond 'rn, 'imm"); |
1581 alu_out = rn_val ^ shifter_operand; | 1625 alu_out = rn_val ^ shifter_operand; |
1582 SetNZFlags(alu_out); | 1626 SetNZFlags(alu_out); |
1583 SetCFlag(shifter_carry_out); | 1627 SetCFlag(shifter_carry_out); |
1584 } else { | 1628 } else { |
1585 ASSERT(type == 0); | 1629 UNIMPLEMENTED(); |
Erik Corry
2010/04/08 12:56:30
UNREACHABLE
Søren Thygesen Gjesse
2010/04/08 13:29:06
Done.
| |
1586 int rm = instr->RmField(); | |
1587 switch (instr->Bits(7, 4)) { | |
1588 case BX: | |
1589 set_pc(get_register(rm)); | |
1590 break; | |
1591 case BLX: { | |
1592 uint32_t old_pc = get_pc(); | |
1593 set_pc(get_register(rm)); | |
1594 set_register(lr, old_pc + Instr::kInstrSize); | |
1595 break; | |
1596 } | |
1597 default: | |
1598 UNIMPLEMENTED(); | |
1599 } | |
1600 } | 1630 } |
1601 break; | 1631 break; |
1602 } | 1632 } |
1603 | 1633 |
1604 case CMP: { | 1634 case CMP: { |
1605 if (instr->HasS()) { | 1635 if (instr->HasS()) { |
1606 // Format(instr, "cmp'cond 'rn, 'shift_rm"); | 1636 // Format(instr, "cmp'cond 'rn, 'shift_rm"); |
1607 // Format(instr, "cmp'cond 'rn, 'imm"); | 1637 // Format(instr, "cmp'cond 'rn, 'imm"); |
1608 alu_out = rn_val - shifter_operand; | 1638 alu_out = rn_val - shifter_operand; |
1609 SetNZFlags(alu_out); | 1639 SetNZFlags(alu_out); |
1610 SetCFlag(!BorrowFrom(rn_val, shifter_operand)); | 1640 SetCFlag(!BorrowFrom(rn_val, shifter_operand)); |
1611 SetVFlag(OverflowFrom(alu_out, rn_val, shifter_operand, false)); | 1641 SetVFlag(OverflowFrom(alu_out, rn_val, shifter_operand, false)); |
1612 } else { | 1642 } else { |
1613 UNIMPLEMENTED(); | 1643 UNIMPLEMENTED(); |
1614 } | 1644 } |
1615 break; | 1645 break; |
1616 } | 1646 } |
1617 | 1647 |
1618 case CMN: { | 1648 case CMN: { |
1619 if (instr->HasS()) { | 1649 if (instr->HasS()) { |
1620 // Format(instr, "cmn'cond 'rn, 'shift_rm"); | 1650 // Format(instr, "cmn'cond 'rn, 'shift_rm"); |
1621 // Format(instr, "cmn'cond 'rn, 'imm"); | 1651 // Format(instr, "cmn'cond 'rn, 'imm"); |
1622 alu_out = rn_val + shifter_operand; | 1652 alu_out = rn_val + shifter_operand; |
1623 SetNZFlags(alu_out); | 1653 SetNZFlags(alu_out); |
1624 SetCFlag(!CarryFrom(rn_val, shifter_operand)); | 1654 SetCFlag(!CarryFrom(rn_val, shifter_operand)); |
1625 SetVFlag(OverflowFrom(alu_out, rn_val, shifter_operand, true)); | 1655 SetVFlag(OverflowFrom(alu_out, rn_val, shifter_operand, true)); |
1626 } else { | 1656 } else { |
1627 ASSERT(type == 0); | 1657 UNIMPLEMENTED(); |
Erik Corry
2010/04/08 12:56:30
&here
Søren Thygesen Gjesse
2010/04/08 13:29:06
Done.
| |
1628 int rm = instr->RmField(); | |
1629 int rd = instr->RdField(); | |
1630 switch (instr->Bits(7, 4)) { | |
1631 case CLZ: { | |
1632 uint32_t bits = get_register(rm); | |
1633 int leading_zeros = 0; | |
1634 if (bits == 0) { | |
1635 leading_zeros = 32; | |
1636 } else { | |
1637 while ((bits & 0x80000000u) == 0) { | |
1638 bits <<= 1; | |
1639 leading_zeros++; | |
1640 } | |
1641 } | |
1642 set_register(rd, leading_zeros); | |
1643 break; | |
1644 } | |
1645 default: | |
1646 UNIMPLEMENTED(); | |
1647 } | |
1648 } | 1658 } |
1649 break; | 1659 break; |
1650 } | 1660 } |
1651 | 1661 |
1652 case ORR: { | 1662 case ORR: { |
1653 // Format(instr, "orr'cond's 'rd, 'rn, 'shift_rm"); | 1663 // Format(instr, "orr'cond's 'rd, 'rn, 'shift_rm"); |
1654 // Format(instr, "orr'cond's 'rd, 'rn, 'imm"); | 1664 // Format(instr, "orr'cond's 'rd, 'rn, 'imm"); |
1655 alu_out = rn_val | shifter_operand; | 1665 alu_out = rn_val | shifter_operand; |
1656 set_register(rd, alu_out); | 1666 set_register(rd, alu_out); |
1657 if (instr->HasS()) { | 1667 if (instr->HasS()) { |
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2463 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); | 2473 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); |
2464 uintptr_t address = *stack_slot; | 2474 uintptr_t address = *stack_slot; |
2465 set_register(sp, current_sp + sizeof(uintptr_t)); | 2475 set_register(sp, current_sp + sizeof(uintptr_t)); |
2466 return address; | 2476 return address; |
2467 } | 2477 } |
2468 | 2478 |
2469 | 2479 |
2470 } } // namespace assembler::arm | 2480 } } // namespace assembler::arm |
2471 | 2481 |
2472 #endif // !defined(__arm__) | 2482 #endif // !defined(__arm__) |
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