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Side by Side Diff: llvm-trunk/lib/Target/X86/X86InstrInfo.td

Issue 1557002: llvm x86 support (Closed)
Patch Set: remove whitespace diff Created 10 years, 8 months ago
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1 1
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file describes the X86 instruction set, defining the instructions, and 10 // This file describes the X86 instruction set, defining the instructions, and
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633 defm JG : ICBr<0x7F, 0x8F, "jg\t$dst" , X86_COND_G>; 633 defm JG : ICBr<0x7F, 0x8F, "jg\t$dst" , X86_COND_G>;
634 634
635 // FIXME: What about the CX/RCX versions of this instruction? 635 // FIXME: What about the CX/RCX versions of this instruction?
636 let Uses = [ECX], isBranch = 1, isTerminator = 1 in 636 let Uses = [ECX], isBranch = 1, isTerminator = 1 in
637 def JCXZ8 : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst), 637 def JCXZ8 : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst),
638 "jcxz\t$dst", []>; 638 "jcxz\t$dst", []>;
639 639
640 640
641 // Indirect branches 641 // Indirect branches
642 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { 642 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
643 def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l}\t{*}$dst", 643 // @LOCALMOD-START
644 // NOTE:JMP32m must likely be banned
645 def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "nacljmp\t $dst",
644 [(brind GR32:$dst)]>; 646 [(brind GR32:$dst)]>;
645 def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst", 647
646 [(brind (loadi32 addr:$dst))]>; 648 // def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst" ,
647 649 // [(brind (loadi32 addr:$dst))]>;
648 def FARJMP16i : Iseg16<0xEA, RawFrm, (outs), 650 // @LOCALMOD-END
651 def FARJMP16i : Iseg16<0xEA, RawFrm, (outs),
649 (ins i16imm:$seg, i16imm:$off), 652 (ins i16imm:$seg, i16imm:$off),
650 "ljmp{w}\t$seg, $off", []>, OpSize; 653 "ljmp{w}\t$seg, $off", []>, OpSize;
651 def FARJMP32i : Iseg32<0xEA, RawFrm, (outs), 654 def FARJMP32i : Iseg32<0xEA, RawFrm, (outs),
652 (ins i16imm:$seg, i32imm:$off), 655 (ins i16imm:$seg, i32imm:$off),
653 "ljmp{l}\t$seg, $off", []>; 656 "ljmp{l}\t$seg, $off", []>;
654 657
655 def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst), 658 def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst),
656 "ljmp{w}\t{*}$dst", []>, OpSize; 659 "ljmp{w}\t{*}$dst", []>, OpSize;
657 def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst), 660 def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst),
658 "ljmp{l}\t{*}$dst", []>; 661 "ljmp{l}\t{*}$dst", []>;
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671 let isCall = 1 in 674 let isCall = 1 in
672 // All calls clobber the non-callee saved registers. ESP is marked as 675 // All calls clobber the non-callee saved registers. ESP is marked as
673 // a use to prevent stack-pointer assignments that appear immediately 676 // a use to prevent stack-pointer assignments that appear immediately
674 // before calls from potentially appearing dead. Uses for argument 677 // before calls from potentially appearing dead. Uses for argument
675 // registers are added manually. 678 // registers are added manually.
676 let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, 679 let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
677 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, 680 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
678 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, 681 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
679 XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], 682 XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
680 Uses = [ESP] in { 683 Uses = [ESP] in {
684 // @LOCALMOD-START
685 // NOTE: CALL32m must likely be banned
681 def CALLpcrel32 : Ii32PCRel<0xE8, RawFrm, 686 def CALLpcrel32 : Ii32PCRel<0xE8, RawFrm,
682 (outs), (ins i32imm_pcrel:$dst,variable_ops), 687 (outs), (ins i32imm_pcrel:$dst,variable_ops),
683 "call\t$dst", []>; 688 "call\t$dst", []>;
684 def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops), 689 def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
685 "call\t{*}$dst", [(X86call GR32:$dst)]>; 690 "naclcall\t$dst", [(X86call GR32:$dst)]>;
686 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), 691 // def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
687 "call\t{*}$dst", [(X86call (loadi32 addr:$dst))]>; 692 // "call\t{*}$dst", [(X86call (loadi32 addr:$dst))]>;
688 693 // @LOCALMOD-END
689 def FARCALL16i : Iseg16<0x9A, RawFrm, (outs), 694 def FARCALL16i : Iseg16<0x9A, RawFrm, (outs),
690 (ins i16imm:$seg, i16imm:$off), 695 (ins i16imm:$seg, i16imm:$off),
691 "lcall{w}\t$seg, $off", []>, OpSize; 696 "lcall{w}\t$seg, $off", []>, OpSize;
692 def FARCALL32i : Iseg32<0x9A, RawFrm, (outs), 697 def FARCALL32i : Iseg32<0x9A, RawFrm, (outs),
693 (ins i16imm:$seg, i32imm:$off), 698 (ins i16imm:$seg, i32imm:$off),
694 "lcall{l}\t$seg, $off", []>; 699 "lcall{l}\t$seg, $off", []>;
695 700
696 def FARCALL16m : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst), 701 def FARCALL16m : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst),
697 "lcall{w}\t{*}$dst", []>, OpSize; 702 "lcall{w}\t{*}$dst", []>, OpSize;
698 def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst), 703 def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst),
699 "lcall{l}\t{*}$dst", []>; 704 "lcall{l}\t{*}$dst", []>;
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5259 // XMM Floating point support (requires SSE / SSE2) 5264 // XMM Floating point support (requires SSE / SSE2)
5260 //===----------------------------------------------------------------------===// 5265 //===----------------------------------------------------------------------===//
5261 5266
5262 include "X86InstrSSE.td" 5267 include "X86InstrSSE.td"
5263 5268
5264 //===----------------------------------------------------------------------===// 5269 //===----------------------------------------------------------------------===//
5265 // MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2) 5270 // MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2)
5266 //===----------------------------------------------------------------------===// 5271 //===----------------------------------------------------------------------===//
5267 5272
5268 include "X86InstrMMX.td" 5273 include "X86InstrMMX.td"
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