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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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690 | 690 |
691 void Assembler::bl(int branch_offset, Condition cond) { | 691 void Assembler::bl(int branch_offset, Condition cond) { |
692 ASSERT((branch_offset & 3) == 0); | 692 ASSERT((branch_offset & 3) == 0); |
693 int imm24 = branch_offset >> 2; | 693 int imm24 = branch_offset >> 2; |
694 ASSERT(is_int24(imm24)); | 694 ASSERT(is_int24(imm24)); |
695 emit(cond | B27 | B25 | B24 | (imm24 & Imm24Mask)); | 695 emit(cond | B27 | B25 | B24 | (imm24 & Imm24Mask)); |
696 } | 696 } |
697 | 697 |
698 | 698 |
699 void Assembler::blx(int branch_offset) { // v5 and above | 699 void Assembler::blx(int branch_offset) { // v5 and above |
| 700 WriteRecordedPositions(); |
700 ASSERT((branch_offset & 1) == 0); | 701 ASSERT((branch_offset & 1) == 0); |
701 int h = ((branch_offset & 2) >> 1)*B24; | 702 int h = ((branch_offset & 2) >> 1)*B24; |
702 int imm24 = branch_offset >> 2; | 703 int imm24 = branch_offset >> 2; |
703 ASSERT(is_int24(imm24)); | 704 ASSERT(is_int24(imm24)); |
704 emit(15 << 28 | B27 | B25 | h | (imm24 & Imm24Mask)); | 705 emit(15 << 28 | B27 | B25 | h | (imm24 & Imm24Mask)); |
705 } | 706 } |
706 | 707 |
707 | 708 |
708 void Assembler::blx(Register target, Condition cond) { // v5 and above | 709 void Assembler::blx(Register target, Condition cond) { // v5 and above |
| 710 WriteRecordedPositions(); |
709 ASSERT(!target.is(pc)); | 711 ASSERT(!target.is(pc)); |
710 emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | 3*B4 | target.code()); | 712 emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | 3*B4 | target.code()); |
711 } | 713 } |
712 | 714 |
713 | 715 |
714 void Assembler::bx(Register target, Condition cond) { // v5 and above, plus v4t | 716 void Assembler::bx(Register target, Condition cond) { // v5 and above, plus v4t |
| 717 WriteRecordedPositions(); |
715 ASSERT(!target.is(pc)); // use of pc is actually allowed, but discouraged | 718 ASSERT(!target.is(pc)); // use of pc is actually allowed, but discouraged |
716 emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | B4 | target.code()); | 719 emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | B4 | target.code()); |
717 } | 720 } |
718 | 721 |
719 | 722 |
720 // Data-processing instructions | 723 // Data-processing instructions |
721 void Assembler::and_(Register dst, Register src1, const Operand& src2, | 724 void Assembler::and_(Register dst, Register src1, const Operand& src2, |
722 SBit s, Condition cond) { | 725 SBit s, Condition cond) { |
723 addrmod1(cond | 0*B21 | s, src1, dst, src2); | 726 addrmod1(cond | 0*B21 | s, src1, dst, src2); |
724 } | 727 } |
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803 } | 806 } |
804 | 807 |
805 | 808 |
806 void Assembler::orr(Register dst, Register src1, const Operand& src2, | 809 void Assembler::orr(Register dst, Register src1, const Operand& src2, |
807 SBit s, Condition cond) { | 810 SBit s, Condition cond) { |
808 addrmod1(cond | 12*B21 | s, src1, dst, src2); | 811 addrmod1(cond | 12*B21 | s, src1, dst, src2); |
809 } | 812 } |
810 | 813 |
811 | 814 |
812 void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) { | 815 void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) { |
| 816 if (dst.is(pc)) { |
| 817 WriteRecordedPositions(); |
| 818 } |
813 addrmod1(cond | 13*B21 | s, r0, dst, src); | 819 addrmod1(cond | 13*B21 | s, r0, dst, src); |
814 } | 820 } |
815 | 821 |
816 | 822 |
817 void Assembler::bic(Register dst, Register src1, const Operand& src2, | 823 void Assembler::bic(Register dst, Register src1, const Operand& src2, |
818 SBit s, Condition cond) { | 824 SBit s, Condition cond) { |
819 addrmod1(cond | 14*B21 | s, src1, dst, src2); | 825 addrmod1(cond | 14*B21 | s, src1, dst, src2); |
820 } | 826 } |
821 | 827 |
822 | 828 |
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930 } else { | 936 } else { |
931 ASSERT(!src.rs_.is_valid() && src.shift_imm_ == 0); // only rm allowed | 937 ASSERT(!src.rs_.is_valid() && src.shift_imm_ == 0); // only rm allowed |
932 instr = src.rm_.code(); | 938 instr = src.rm_.code(); |
933 } | 939 } |
934 emit(cond | instr | B24 | B21 | fields | 15*B12); | 940 emit(cond | instr | B24 | B21 | fields | 15*B12); |
935 } | 941 } |
936 | 942 |
937 | 943 |
938 // Load/Store instructions | 944 // Load/Store instructions |
939 void Assembler::ldr(Register dst, const MemOperand& src, Condition cond) { | 945 void Assembler::ldr(Register dst, const MemOperand& src, Condition cond) { |
| 946 if (dst.is(pc)) { |
| 947 WriteRecordedPositions(); |
| 948 } |
940 addrmod2(cond | B26 | L, dst, src); | 949 addrmod2(cond | B26 | L, dst, src); |
941 | 950 |
942 // Eliminate pattern: push(r), pop(r) | 951 // Eliminate pattern: push(r), pop(r) |
943 // str(r, MemOperand(sp, 4, NegPreIndex), al) | 952 // str(r, MemOperand(sp, 4, NegPreIndex), al) |
944 // ldr(r, MemOperand(sp, 4, PostIndex), al) | 953 // ldr(r, MemOperand(sp, 4, PostIndex), al) |
945 // Both instructions can be eliminated. | 954 // Both instructions can be eliminated. |
946 int pattern_size = 2 * kInstrSize; | 955 int pattern_size = 2 * kInstrSize; |
947 if (FLAG_push_pop_elimination && | 956 if (FLAG_push_pop_elimination && |
948 last_bound_pos_ <= (pc_offset() - pattern_size) && | 957 last_bound_pos_ <= (pc_offset() - pattern_size) && |
949 reloc_info_writer.last_pc() <= (pc_ - pattern_size) && | 958 reloc_info_writer.last_pc() <= (pc_ - pattern_size) && |
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1267 CheckBuffer(); | 1276 CheckBuffer(); |
1268 RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg)); | 1277 RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg)); |
1269 } | 1278 } |
1270 } | 1279 } |
1271 | 1280 |
1272 | 1281 |
1273 void Assembler::RecordPosition(int pos) { | 1282 void Assembler::RecordPosition(int pos) { |
1274 if (pos == RelocInfo::kNoPosition) return; | 1283 if (pos == RelocInfo::kNoPosition) return; |
1275 ASSERT(pos >= 0); | 1284 ASSERT(pos >= 0); |
1276 current_position_ = pos; | 1285 current_position_ = pos; |
1277 WriteRecordedPositions(); | |
1278 } | 1286 } |
1279 | 1287 |
1280 | 1288 |
1281 void Assembler::RecordStatementPosition(int pos) { | 1289 void Assembler::RecordStatementPosition(int pos) { |
1282 if (pos == RelocInfo::kNoPosition) return; | 1290 if (pos == RelocInfo::kNoPosition) return; |
1283 ASSERT(pos >= 0); | 1291 ASSERT(pos >= 0); |
1284 current_statement_position_ = pos; | 1292 current_statement_position_ = pos; |
1285 WriteRecordedPositions(); | |
1286 } | 1293 } |
1287 | 1294 |
1288 | 1295 |
1289 void Assembler::WriteRecordedPositions() { | 1296 void Assembler::WriteRecordedPositions() { |
1290 // Write the statement position if it is different from what was written last | 1297 // Write the statement position if it is different from what was written last |
1291 // time. | 1298 // time. |
1292 if (current_statement_position_ != written_statement_position_) { | 1299 if (current_statement_position_ != written_statement_position_) { |
1293 CheckBuffer(); | 1300 CheckBuffer(); |
1294 RecordRelocInfo(RelocInfo::STATEMENT_POSITION, current_statement_position_); | 1301 RecordRelocInfo(RelocInfo::STATEMENT_POSITION, current_statement_position_); |
1295 written_statement_position_ = current_statement_position_; | 1302 written_statement_position_ = current_statement_position_; |
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1476 bind(&after_pool); | 1483 bind(&after_pool); |
1477 } | 1484 } |
1478 | 1485 |
1479 // Since a constant pool was just emitted, move the check offset forward by | 1486 // Since a constant pool was just emitted, move the check offset forward by |
1480 // the standard interval. | 1487 // the standard interval. |
1481 next_buffer_check_ = pc_offset() + kCheckConstInterval; | 1488 next_buffer_check_ = pc_offset() + kCheckConstInterval; |
1482 } | 1489 } |
1483 | 1490 |
1484 | 1491 |
1485 } } // namespace v8::internal | 1492 } } // namespace v8::internal |
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