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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 555 } | 555 } |
| 556 | 556 |
| 557 void cmpb(Register dst, Immediate src) { | 557 void cmpb(Register dst, Immediate src) { |
| 558 immediate_arithmetic_op_8(0x7, dst, src); | 558 immediate_arithmetic_op_8(0x7, dst, src); |
| 559 } | 559 } |
| 560 | 560 |
| 561 void cmpb(const Operand& dst, Immediate src) { | 561 void cmpb(const Operand& dst, Immediate src) { |
| 562 immediate_arithmetic_op_8(0x7, dst, src); | 562 immediate_arithmetic_op_8(0x7, dst, src); |
| 563 } | 563 } |
| 564 | 564 |
| 565 void cmpl(Register dst, Register src) { |
| 566 arithmetic_op_32(0x3B, dst, src); |
| 567 } |
| 568 |
| 569 void cmpl(Register dst, Immediate src) { |
| 570 immediate_arithmetic_op_32(0x7, dst, src); |
| 571 } |
| 572 |
| 565 void cmpq(Register dst, Register src) { | 573 void cmpq(Register dst, Register src) { |
| 566 arithmetic_op(0x3B, dst, src); | 574 arithmetic_op(0x3B, dst, src); |
| 567 } | 575 } |
| 568 | 576 |
| 569 void cmpq(Register dst, const Operand& src) { | 577 void cmpq(Register dst, const Operand& src) { |
| 570 arithmetic_op(0x3B, dst, src); | 578 arithmetic_op(0x3B, dst, src); |
| 571 } | 579 } |
| 572 | 580 |
| 573 void cmpq(const Operand& dst, Register src) { | 581 void cmpq(const Operand& dst, Register src) { |
| 574 arithmetic_op(0x39, src, dst); | 582 arithmetic_op(0x39, src, dst); |
| 575 } | 583 } |
| 576 | 584 |
| 577 void cmpq(Register dst, Immediate src) { | 585 void cmpq(Register dst, Immediate src) { |
| 578 immediate_arithmetic_op(0x7, dst, src); | 586 immediate_arithmetic_op(0x7, dst, src); |
| 579 } | 587 } |
| 580 | 588 |
| 581 void cmpl(Register dst, Immediate src) { | |
| 582 immediate_arithmetic_op_32(0x7, dst, src); | |
| 583 } | |
| 584 | |
| 585 void cmpq(const Operand& dst, Immediate src) { | 589 void cmpq(const Operand& dst, Immediate src) { |
| 586 immediate_arithmetic_op(0x7, dst, src); | 590 immediate_arithmetic_op(0x7, dst, src); |
| 587 } | 591 } |
| 588 | 592 |
| 589 void and_(Register dst, Register src) { | 593 void and_(Register dst, Register src) { |
| 590 arithmetic_op(0x23, dst, src); | 594 arithmetic_op(0x23, dst, src); |
| 591 } | 595 } |
| 592 | 596 |
| 593 void and_(Register dst, const Operand& src) { | 597 void and_(Register dst, const Operand& src) { |
| 594 arithmetic_op(0x23, dst, src); | 598 arithmetic_op(0x23, dst, src); |
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| 733 void subl(const Operand& dst, Immediate src) { | 737 void subl(const Operand& dst, Immediate src) { |
| 734 immediate_arithmetic_op_32(0x5, dst, src); | 738 immediate_arithmetic_op_32(0x5, dst, src); |
| 735 } | 739 } |
| 736 | 740 |
| 737 void subl(Register dst, Immediate src) { | 741 void subl(Register dst, Immediate src) { |
| 738 immediate_arithmetic_op_32(0x5, dst, src); | 742 immediate_arithmetic_op_32(0x5, dst, src); |
| 739 } | 743 } |
| 740 | 744 |
| 741 void testb(Register reg, Immediate mask); | 745 void testb(Register reg, Immediate mask); |
| 742 void testb(const Operand& op, Immediate mask); | 746 void testb(const Operand& op, Immediate mask); |
| 747 void testl(Register dst, Register src); |
| 743 void testl(Register reg, Immediate mask); | 748 void testl(Register reg, Immediate mask); |
| 744 void testl(const Operand& op, Immediate mask); | 749 void testl(const Operand& op, Immediate mask); |
| 745 void testq(const Operand& op, Register reg); | 750 void testq(const Operand& op, Register reg); |
| 746 void testq(Register dst, Register src); | 751 void testq(Register dst, Register src); |
| 747 void testq(Register dst, Immediate mask); | 752 void testq(Register dst, Immediate mask); |
| 748 | 753 |
| 749 void xor_(Register dst, Register src) { | 754 void xor_(Register dst, Register src) { |
| 750 arithmetic_op(0x33, dst, src); | 755 arithmetic_op(0x33, dst, src); |
| 751 } | 756 } |
| 752 | 757 |
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| 1169 private: | 1174 private: |
| 1170 Assembler* assembler_; | 1175 Assembler* assembler_; |
| 1171 #ifdef DEBUG | 1176 #ifdef DEBUG |
| 1172 int space_before_; | 1177 int space_before_; |
| 1173 #endif | 1178 #endif |
| 1174 }; | 1179 }; |
| 1175 | 1180 |
| 1176 } } // namespace v8::internal | 1181 } } // namespace v8::internal |
| 1177 | 1182 |
| 1178 #endif // V8_X64_ASSEMBLER_X64_H_ | 1183 #endif // V8_X64_ASSEMBLER_X64_H_ |
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