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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 830 SBit s, Condition cond) { | 830 SBit s, Condition cond) { |
| 831 ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc)); | 831 ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc)); |
| 832 emit(cond | A | s | dst.code()*B16 | srcA.code()*B12 | | 832 emit(cond | A | s | dst.code()*B16 | srcA.code()*B12 | |
| 833 src2.code()*B8 | B7 | B4 | src1.code()); | 833 src2.code()*B8 | B7 | B4 | src1.code()); |
| 834 } | 834 } |
| 835 | 835 |
| 836 | 836 |
| 837 void Assembler::mul(Register dst, Register src1, Register src2, | 837 void Assembler::mul(Register dst, Register src1, Register src2, |
| 838 SBit s, Condition cond) { | 838 SBit s, Condition cond) { |
| 839 ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc)); | 839 ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc)); |
| 840 // dst goes in bits 16-19 for this instruction! |
| 840 emit(cond | s | dst.code()*B16 | src2.code()*B8 | B7 | B4 | src1.code()); | 841 emit(cond | s | dst.code()*B16 | src2.code()*B8 | B7 | B4 | src1.code()); |
| 841 } | 842 } |
| 842 | 843 |
| 843 | 844 |
| 844 void Assembler::smlal(Register dstL, | 845 void Assembler::smlal(Register dstL, |
| 845 Register dstH, | 846 Register dstH, |
| 846 Register src1, | 847 Register src1, |
| 847 Register src2, | 848 Register src2, |
| 848 SBit s, | 849 SBit s, |
| 849 Condition cond) { | 850 Condition cond) { |
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| 881 | 882 |
| 882 | 883 |
| 883 void Assembler::umull(Register dstL, | 884 void Assembler::umull(Register dstL, |
| 884 Register dstH, | 885 Register dstH, |
| 885 Register src1, | 886 Register src1, |
| 886 Register src2, | 887 Register src2, |
| 887 SBit s, | 888 SBit s, |
| 888 Condition cond) { | 889 Condition cond) { |
| 889 ASSERT(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc)); | 890 ASSERT(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc)); |
| 890 ASSERT(!dstL.is(dstH)); | 891 ASSERT(!dstL.is(dstH)); |
| 891 emit(cond | B23 | B22 | s | dstH.code()*B16 | dstL.code()*B12 | | 892 emit(cond | B23 | s | dstH.code()*B16 | dstL.code()*B12 | |
| 892 src2.code()*B8 | B7 | B4 | src1.code()); | 893 src2.code()*B8 | B7 | B4 | src1.code()); |
| 893 } | 894 } |
| 894 | 895 |
| 895 | 896 |
| 896 // Miscellaneous arithmetic instructions | 897 // Miscellaneous arithmetic instructions |
| 897 void Assembler::clz(Register dst, Register src, Condition cond) { | 898 void Assembler::clz(Register dst, Register src, Condition cond) { |
| 898 // v5 and above. | 899 // v5 and above. |
| 899 ASSERT(!dst.is(pc) && !src.is(pc)); | 900 ASSERT(!dst.is(pc) && !src.is(pc)); |
| 900 emit(cond | B24 | B22 | B21 | 15*B16 | dst.code()*B12 | | 901 emit(cond | B24 | B22 | B21 | 15*B16 | dst.code()*B12 | |
| 901 15*B8 | B4 | src.code()); | 902 15*B8 | B4 | src.code()); |
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| 1475 bind(&after_pool); | 1476 bind(&after_pool); |
| 1476 } | 1477 } |
| 1477 | 1478 |
| 1478 // Since a constant pool was just emitted, move the check offset forward by | 1479 // Since a constant pool was just emitted, move the check offset forward by |
| 1479 // the standard interval. | 1480 // the standard interval. |
| 1480 next_buffer_check_ = pc_offset() + kCheckConstInterval; | 1481 next_buffer_check_ = pc_offset() + kCheckConstInterval; |
| 1481 } | 1482 } |
| 1482 | 1483 |
| 1483 | 1484 |
| 1484 } } // namespace v8::internal | 1485 } } // namespace v8::internal |
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