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Side by Side Diff: src/x64/assembler-x64.h

Issue 151200: X64: Remove optimistic smi operations on non-smis. They cannot be undone on ... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 11 years, 5 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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515 } 515 }
516 516
517 void addl(Register dst, Register src) { 517 void addl(Register dst, Register src) {
518 arithmetic_op_32(0x03, dst, src); 518 arithmetic_op_32(0x03, dst, src);
519 } 519 }
520 520
521 void addl(Register dst, Immediate src) { 521 void addl(Register dst, Immediate src) {
522 immediate_arithmetic_op_32(0x0, dst, src); 522 immediate_arithmetic_op_32(0x0, dst, src);
523 } 523 }
524 524
525 void addl(const Operand& dst, Immediate src) {
526 immediate_arithmetic_op_32(0x0, dst, src);
527 }
528
525 void addq(Register dst, const Operand& src) { 529 void addq(Register dst, const Operand& src) {
526 arithmetic_op(0x03, dst, src); 530 arithmetic_op(0x03, dst, src);
527 } 531 }
528 532
529 533
530 void addq(const Operand& dst, Register src) { 534 void addq(const Operand& dst, Register src) {
531 arithmetic_op(0x01, src, dst); 535 arithmetic_op(0x01, src, dst);
532 } 536 }
533 537
534 void addq(Register dst, Immediate src) { 538 void addq(Register dst, Immediate src) {
535 immediate_arithmetic_op(0x0, dst, src); 539 immediate_arithmetic_op(0x0, dst, src);
536 } 540 }
537 541
538 void addq(const Operand& dst, Immediate src) { 542 void addq(const Operand& dst, Immediate src) {
539 immediate_arithmetic_op(0x0, dst, src); 543 immediate_arithmetic_op(0x0, dst, src);
540 } 544 }
541 545
542 void addl(const Operand& dst, Immediate src) {
543 immediate_arithmetic_op_32(0x0, dst, src);
544 }
545
546 void cmpb(Register dst, Immediate src) { 546 void cmpb(Register dst, Immediate src) {
547 immediate_arithmetic_op_8(0x7, dst, src); 547 immediate_arithmetic_op_8(0x7, dst, src);
548 } 548 }
549 549
550 void cmpb(const Operand& dst, Immediate src) { 550 void cmpb(const Operand& dst, Immediate src) {
551 immediate_arithmetic_op_8(0x7, dst, src); 551 immediate_arithmetic_op_8(0x7, dst, src);
552 } 552 }
553 553
554 void cmpq(Register dst, Register src) { 554 void cmpq(Register dst, Register src) {
555 arithmetic_op(0x3B, dst, src); 555 arithmetic_op(0x3B, dst, src);
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716 } 716 }
717 717
718 void subl(Register dst, Register src) { 718 void subl(Register dst, Register src) {
719 arithmetic_op_32(0x2B, dst, src); 719 arithmetic_op_32(0x2B, dst, src);
720 } 720 }
721 721
722 void subl(const Operand& dst, Immediate src) { 722 void subl(const Operand& dst, Immediate src) {
723 immediate_arithmetic_op_32(0x5, dst, src); 723 immediate_arithmetic_op_32(0x5, dst, src);
724 } 724 }
725 725
726 void subl(Register dst, Immediate src) {
727 immediate_arithmetic_op_32(0x5, dst, src);
728 }
729
726 void testb(Register reg, Immediate mask); 730 void testb(Register reg, Immediate mask);
727 void testb(const Operand& op, Immediate mask); 731 void testb(const Operand& op, Immediate mask);
728 void testl(Register reg, Immediate mask); 732 void testl(Register reg, Immediate mask);
729 void testl(const Operand& op, Immediate mask); 733 void testl(const Operand& op, Immediate mask);
730 void testq(const Operand& op, Register reg); 734 void testq(const Operand& op, Register reg);
731 void testq(Register dst, Register src); 735 void testq(Register dst, Register src);
732 void testq(Register dst, Immediate mask); 736 void testq(Register dst, Immediate mask);
733 737
734 void xor_(Register dst, Register src) { 738 void xor_(Register dst, Register src) {
735 arithmetic_op(0x33, dst, src); 739 arithmetic_op(0x33, dst, src);
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1154 private: 1158 private:
1155 Assembler* assembler_; 1159 Assembler* assembler_;
1156 #ifdef DEBUG 1160 #ifdef DEBUG
1157 int space_before_; 1161 int space_before_;
1158 #endif 1162 #endif
1159 }; 1163 };
1160 1164
1161 } } // namespace v8::internal 1165 } } // namespace v8::internal
1162 1166
1163 #endif // V8_X64_ASSEMBLER_X64_H_ 1167 #endif // V8_X64_ASSEMBLER_X64_H_
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