| OLD | NEW |
| 1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
| (...skipping 59 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 70 XMMRegister xmm12 = { 12 }; | 70 XMMRegister xmm12 = { 12 }; |
| 71 XMMRegister xmm13 = { 13 }; | 71 XMMRegister xmm13 = { 13 }; |
| 72 XMMRegister xmm14 = { 14 }; | 72 XMMRegister xmm14 = { 14 }; |
| 73 XMMRegister xmm15 = { 15 }; | 73 XMMRegister xmm15 = { 15 }; |
| 74 | 74 |
| 75 | 75 |
| 76 Operand::Operand(Register base, int32_t disp): rex_(0) { | 76 Operand::Operand(Register base, int32_t disp): rex_(0) { |
| 77 len_ = 1; | 77 len_ = 1; |
| 78 if (base.is(rsp) || base.is(r12)) { | 78 if (base.is(rsp) || base.is(r12)) { |
| 79 // SIB byte is needed to encode (rsp + offset) or (r12 + offset). | 79 // SIB byte is needed to encode (rsp + offset) or (r12 + offset). |
| 80 set_sib(kTimes1, rsp, base); | 80 set_sib(times_1, rsp, base); |
| 81 } | 81 } |
| 82 | 82 |
| 83 if (disp == 0 && !base.is(rbp) && !base.is(r13)) { | 83 if (disp == 0 && !base.is(rbp) && !base.is(r13)) { |
| 84 set_modrm(0, base); | 84 set_modrm(0, base); |
| 85 } else if (is_int8(disp)) { | 85 } else if (is_int8(disp)) { |
| 86 set_modrm(1, base); | 86 set_modrm(1, base); |
| 87 set_disp8(disp); | 87 set_disp8(disp); |
| 88 } else { | 88 } else { |
| 89 set_modrm(2, base); | 89 set_modrm(2, base); |
| 90 set_disp32(disp); | 90 set_disp32(disp); |
| (...skipping 1774 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1865 bool BreakLocationIterator::IsDebugBreakAtReturn() { | 1865 bool BreakLocationIterator::IsDebugBreakAtReturn() { |
| 1866 UNIMPLEMENTED(); | 1866 UNIMPLEMENTED(); |
| 1867 return false; | 1867 return false; |
| 1868 } | 1868 } |
| 1869 | 1869 |
| 1870 void BreakLocationIterator::SetDebugBreakAtReturn() { | 1870 void BreakLocationIterator::SetDebugBreakAtReturn() { |
| 1871 UNIMPLEMENTED(); | 1871 UNIMPLEMENTED(); |
| 1872 } | 1872 } |
| 1873 | 1873 |
| 1874 } } // namespace v8::internal | 1874 } } // namespace v8::internal |
| OLD | NEW |