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Issue 14170: Refactored the recording of source position in the generated code. The code g... (Closed)

Created:
12 years ago by Søren Thygesen Gjesse
Modified:
9 years, 7 months ago
CC:
v8-dev
Visibility:
Public.

Description

Refactored the recording of source position in the generated code. The code generator now has two methods void CodeForStatement(Node* node) void CodeForSourcePosition(int pos) The first is used to indicate that code is about to be generated for the given statement and the second is used to indicate that code is about to be generated for the given source position. Added position information for some statements which was missing whem. Updated the code generator for ARM to emit source position the same way as for IA-32. Added an assert to ensure that deferred code stubs will always have a source source position as if it has not it will take whatever source position before which makes no sense. The passing test on ARM has only been tested using the simulator. Committed: http://code.google.com/p/v8/source/detail?r=985

Patch Set 1 #

Total comments: 5

Patch Set 2 : '' #

Unified diffs Side-by-side diffs Delta from patch set Stats (+162 lines, -126 lines) Patch
M src/assembler-arm.h View 2 chunks +7 lines, -9 lines 0 comments Download
M src/assembler-arm.cc View 2 chunks +30 lines, -12 lines 0 comments Download
M src/assembler-ia32.h View 1 2 chunks +6 lines, -4 lines 0 comments Download
M src/assembler-ia32.cc View 2 chunks +20 lines, -13 lines 0 comments Download
M src/codegen.cc View 3 chunks +25 lines, -5 lines 0 comments Download
M src/codegen-arm.h View 1 chunk +5 lines, -4 lines 0 comments Download
M src/codegen-arm.cc View 32 chunks +31 lines, -34 lines 0 comments Download
M src/codegen-ia32.h View 1 chunk +5 lines, -5 lines 0 comments Download
M src/codegen-ia32.cc View 33 chunks +30 lines, -39 lines 0 comments Download
M src/parser.cc View 1 chunk +3 lines, -0 lines 0 comments Download
M test/mjsunit/mjsunit.status View 1 chunk +0 lines, -1 line 0 comments Download

Messages

Total messages: 4 (0 generated)
Søren Thygesen Gjesse
This also works with your experimental patch.
12 years ago (2008-12-16 22:19:37 UTC) #1
Mads Ager (chromium)
LGTM http://codereview.chromium.org/14170/diff/1/9 File src/assembler-ia32.cc (right): http://codereview.chromium.org/14170/diff/1/9#newcode1993 Line 1993: ASSERT(pos != RelocInfo::kNoPosition); In the ARM code, ...
12 years ago (2008-12-17 07:45:35 UTC) #2
Søren Thygesen Gjesse
http://codereview.chromium.org/14170/diff/1/9 File src/assembler-ia32.cc (right): http://codereview.chromium.org/14170/diff/1/9#newcode1993 Line 1993: ASSERT(pos != RelocInfo::kNoPosition); On 2008/12/17 07:45:35, Mads Ager ...
12 years ago (2008-12-17 08:20:26 UTC) #3
iposva
12 years ago (2008-12-17 08:30:39 UTC) #4
How much work would be involved in having ARM and IA32 assemblers match when
relocation info is generated?

-Ivan

http://codereview.chromium.org/14170/diff/1/9
File src/assembler-ia32.cc (right):

http://codereview.chromium.org/14170/diff/1/9#newcode1993
Line 1993: ASSERT(pos != RelocInfo::kNoPosition);
ARM also has a peephole optimizer so it should mirror what we do for IA32. We
have just not investigated the code quality as much at this point.

 2008/12/17 08:20:26, Søren Gjesse wrote:
> On 2008/12/17 07:45:35, Mads Ager wrote:
> > In the ARM code, RecordPosition and RecordStatementPosition called
> > WriteRecordedPositions.  Why is that not needed here (or is it not needed on
> > ARM)?
> 
> The reason for this it that on Intel we postpone the actual writing to the
> relocation information until the point where there can actually be a debug
> break. Currently it means that the positions are written whenever either a
call
> instruction  is written or when the JavaScript return relocation information
> record is written. The reason for postponing it on Intel was to make the
> peephole optimizer more efficient as it could not eliminate instructions which
> har relocation information attached to them.

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