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Side by Side Diff: board/chromeos_st15/memory_map.c

Issue 1329001: ST1.5 board support and some ST1.0/1.5 common changes. (Closed)
Patch Set: Created 10 years, 9 months ago
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1 /*
2 * memory_map.c
3 * Table that defines U-Boot memory map. It is used to build the MMU
4 * page tables.
5 *
6 * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * * Neither the name of Code Aurora Forum nor
16 * the names of its contributors may be used to endorse or promote
17 * products derived from this software without specific prior written
18 * permission.
19 *
20 * Alternatively, provided that this notice is retained in full, this software
21 * may be relicensed by the recipient under the terms of the GNU General Public
22 * License version 2 ("GPL") and only version 2, in which case the provisions of
23 * the GPL apply INSTEAD OF those given above. If the recipient relicenses the
24 * software under the GPL, then the identification text in the MODULE_LICENSE
25 * macro must be changed to reflect "GPLv2" instead of "Dual BSD/GPL". Once a
26 * recipient changes the license terms to the GPL, subsequent recipients shall
27 * not relicense under alternate licensing terms, including the BSD or dual
28 * BSD/GPL terms. In addition, the following license statement immediately
29 * below and between the words START and END shall also then apply when this
30 * software is relicensed under the GPL:
31 *
32 * START
33 *
34 * This program is free software; you can redistribute it and/or modify it under
35 * the terms of the GNU General Public License version 2 and only version 2 as
36 * published by the Free Software Foundation.
37 *
38 * This program is distributed in the hope that it will be useful, but WITHOUT
39 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
40 * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
41 * details.
42 *
43 * You should have received a copy of the GNU General Public License along with
44 * this program; if not, write to the Free Software Foundation, Inc.,
45 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
46 *
47 * END
48 *
49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
50 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
51 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
52 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
53 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
54 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
55 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
56 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
57 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
58 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
59 * POSSIBILITY OF SUCH DAMAGE.
60 *
61 */
62
63 #include <common.h>
64 #include <asm/arch/memtypes.h>
65
66 #define ONE_MB (1024 * 1024)
67
68 /*
69 * U-Boot memory map.
70 * Memory regions in the following table cannot overlap. All memory regions acce ssible by
71 * U-Boot should be in this table EXCEPT the kernel SDRAM regions which will be added
72 * to the page table by dram_reinit().
73 */
74 mem_map_entry_t memory_map[ ] =
75 {
76 // Memory regions in SMI SDRAM
77 { UBOOT_SDRAM_BASE, UBOOT_SDRAM_SIZE, MEM_TYPE_UBOOT, 0 },
78 { SMEM_START, SMEM_SIZE, MEM_TYPE_SMEM, 0 }, // SME M (shared memory)
79
80 #ifdef CONFIG_QSD8X50_LCDC
81 { LCDC_FB_ADDR, LCDC_FB_SIZE, MEM_TYPE_FRAME_BUFFER, 0 }, // Fra me buffer for LCDC
82 #endif
83
84 // EBI2 attached peripherals
85 { EBI2CS7_BASE, 1*ONE_MB, MEM_TYPE_PERIPHERAL, 0 }, // Eth ernet controller on EBI2 CS7
86
87 // Internal peripherals
88 { 0xA0000000, 17*ONE_MB, MEM_TYPE_PERIPHERAL, 0 }, // Fas t Peripheral Bus
89 { 0xA8000000, 48*ONE_MB, MEM_TYPE_PERIPHERAL, 0 }, // Slo w Peripheral Bus
90 { 0xAC000000, 16*ONE_MB, MEM_TYPE_PERIPHERAL, 0 }, // Sco rpion Processor SubSystem (SPSS)
91
92 // End of Table
93 { END_OF_TABLE, END_OF_TABLE, END_OF_TABLE, 0 }
94 };
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