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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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116 } | 116 } |
117 | 117 |
118 | 118 |
119 void Assembler::emit_optional_rex_32(Register reg, const Operand& op) { | 119 void Assembler::emit_optional_rex_32(Register reg, const Operand& op) { |
120 byte rex_bits = (reg.code() & 0x8) >> 1 | op.rex_; | 120 byte rex_bits = (reg.code() & 0x8) >> 1 | op.rex_; |
121 if (rex_bits != 0) emit(0x40 | rex_bits); | 121 if (rex_bits != 0) emit(0x40 | rex_bits); |
122 } | 122 } |
123 | 123 |
124 | 124 |
125 void Assembler::emit_optional_rex_32(Register rm_reg) { | 125 void Assembler::emit_optional_rex_32(Register rm_reg) { |
126 if (rm_reg.code() & 0x8 != 0) emit(0x41); | 126 if (rm_reg.code() > 0x7) emit(0x41); |
Lasse Reichstein
2009/06/19 09:03:24
I've used ">= 0x8" in other places. We really sho
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127 } | 127 } |
128 | 128 |
129 | 129 |
130 void Assembler::emit_optional_rex_32(const Operand& op) { | 130 void Assembler::emit_optional_rex_32(const Operand& op) { |
131 if (op.rex_ != 0) emit(0x40 | op.rex_); | 131 if (op.rex_ != 0) emit(0x40 | op.rex_); |
132 } | 132 } |
133 | 133 |
134 | 134 |
135 Address Assembler::target_address_at(Address pc) { | 135 Address Assembler::target_address_at(Address pc) { |
136 return Memory::Address_at(pc); | 136 return Memory::Address_at(pc); |
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275 ASSERT(len_ == 1 || len_ == 2); | 275 ASSERT(len_ == 1 || len_ == 2); |
276 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); | 276 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); |
277 *p = disp; | 277 *p = disp; |
278 len_ += sizeof(int32_t); | 278 len_ += sizeof(int32_t); |
279 } | 279 } |
280 | 280 |
281 | 281 |
282 } } // namespace v8::internal | 282 } } // namespace v8::internal |
283 | 283 |
284 #endif // V8_X64_ASSEMBLER_X64_INL_H_ | 284 #endif // V8_X64_ASSEMBLER_X64_INL_H_ |
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