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Side by Side Diff: src/x64/assembler-x64.h

Issue 125185: X64: Implementation of a bunch of stubs, and some new opcodes. (Closed)
Patch Set: Addressed review comments. Created 11 years, 6 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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108 extern Register r8; 108 extern Register r8;
109 extern Register r9; 109 extern Register r9;
110 extern Register r10; 110 extern Register r10;
111 extern Register r11; 111 extern Register r11;
112 extern Register r12; 112 extern Register r12;
113 extern Register r13; 113 extern Register r13;
114 extern Register r14; 114 extern Register r14;
115 extern Register r15; 115 extern Register r15;
116 extern Register no_reg; 116 extern Register no_reg;
117 117
118
119 struct MMXRegister {
120 bool is_valid() const { return 0 <= code_ && code_ < 2; }
121 int code() const {
122 ASSERT(is_valid());
123 return code_;
124 }
125
126 int code_;
127 };
128
129 extern MMXRegister mm0;
130 extern MMXRegister mm1;
131 extern MMXRegister mm2;
132 extern MMXRegister mm3;
133 extern MMXRegister mm4;
134 extern MMXRegister mm5;
135 extern MMXRegister mm6;
136 extern MMXRegister mm7;
137 extern MMXRegister mm8;
138 extern MMXRegister mm9;
139 extern MMXRegister mm10;
140 extern MMXRegister mm11;
141 extern MMXRegister mm12;
142 extern MMXRegister mm13;
143 extern MMXRegister mm14;
144 extern MMXRegister mm15;
145
146
118 struct XMMRegister { 147 struct XMMRegister {
119 bool is_valid() const { return 0 <= code_ && code_ < 2; } 148 bool is_valid() const { return 0 <= code_ && code_ < 2; }
120 int code() const { 149 int code() const {
121 ASSERT(is_valid()); 150 ASSERT(is_valid());
122 return code_; 151 return code_;
123 } 152 }
124 153
125 int code_; 154 int code_;
126 }; 155 };
127 156
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439 void movq(const Operand& dst, Immediate value); 468 void movq(const Operand& dst, Immediate value);
440 // New x64 instructions to load a 64-bit immediate into a register. 469 // New x64 instructions to load a 64-bit immediate into a register.
441 // All 64-bit immediates must have a relocation mode. 470 // All 64-bit immediates must have a relocation mode.
442 void movq(Register dst, void* ptr, RelocInfo::Mode rmode); 471 void movq(Register dst, void* ptr, RelocInfo::Mode rmode);
443 void movq(Register dst, int64_t value, RelocInfo::Mode rmode); 472 void movq(Register dst, int64_t value, RelocInfo::Mode rmode);
444 void movq(Register dst, const char* s, RelocInfo::Mode rmode); 473 void movq(Register dst, const char* s, RelocInfo::Mode rmode);
445 // Moves the address of the external reference into the register. 474 // Moves the address of the external reference into the register.
446 void movq(Register dst, ExternalReference ext); 475 void movq(Register dst, ExternalReference ext);
447 void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode); 476 void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode);
448 477
478 void movsxlq(Register dst, Register src);
479 void movzxbq(Register dst, const Operand& src);
480
449 // New x64 instruction to load from an immediate 64-bit pointer into RAX. 481 // New x64 instruction to load from an immediate 64-bit pointer into RAX.
450 void load_rax(void* ptr, RelocInfo::Mode rmode); 482 void load_rax(void* ptr, RelocInfo::Mode rmode);
451 void load_rax(ExternalReference ext); 483 void load_rax(ExternalReference ext);
452 484
453 // Conditional moves 485 // Conditional moves
454 // Implement conditional moves here. 486 // Implement conditional moves here.
455 487
456 // Exchange two registers 488 // Exchange two registers
457 void xchg(Register dst, Register src); 489 void xchg(Register dst, Register src);
458 490
459 // Arithmetics 491 // Arithmetics
460 void addq(Register dst, Register src) { 492 void addq(Register dst, Register src) {
461 arithmetic_op(0x03, dst, src); 493 arithmetic_op(0x03, dst, src);
462 } 494 }
463 495
496 void addl(Register dst, Register src) {
497 arithmetic_op_32(0x03, dst, src);
498 }
499
464 void addq(Register dst, const Operand& src) { 500 void addq(Register dst, const Operand& src) {
465 arithmetic_op(0x03, dst, src); 501 arithmetic_op(0x03, dst, src);
466 } 502 }
467 503
468 504
469 void addq(const Operand& dst, Register src) { 505 void addq(const Operand& dst, Register src) {
470 arithmetic_op(0x01, src, dst); 506 arithmetic_op(0x01, src, dst);
471 } 507 }
472 508
473 void addq(Register dst, Immediate src) { 509 void addq(Register dst, Immediate src) {
(...skipping 21 matching lines...) Expand all
495 } 531 }
496 532
497 void cmpq(const Operand& dst, Register src) { 533 void cmpq(const Operand& dst, Register src) {
498 arithmetic_op(0x39, src, dst); 534 arithmetic_op(0x39, src, dst);
499 } 535 }
500 536
501 void cmpq(Register dst, Immediate src) { 537 void cmpq(Register dst, Immediate src) {
502 immediate_arithmetic_op(0x7, dst, src); 538 immediate_arithmetic_op(0x7, dst, src);
503 } 539 }
504 540
541 void cmpl(Register dst, Immediate src) {
542 immediate_arithmetic_op_32(0x7, dst, src);
543 }
544
505 void cmpq(const Operand& dst, Immediate src) { 545 void cmpq(const Operand& dst, Immediate src) {
506 immediate_arithmetic_op(0x7, dst, src); 546 immediate_arithmetic_op(0x7, dst, src);
507 } 547 }
508 548
509 void and_(Register dst, Register src) { 549 void and_(Register dst, Register src) {
510 arithmetic_op(0x23, dst, src); 550 arithmetic_op(0x23, dst, src);
511 } 551 }
512 552
513 void and_(Register dst, const Operand& src) { 553 void and_(Register dst, const Operand& src) {
514 arithmetic_op(0x23, dst, src); 554 arithmetic_op(0x23, dst, src);
(...skipping 18 matching lines...) Expand all
533 // Sign-extends rax into rdx:rax. 573 // Sign-extends rax into rdx:rax.
534 void cqo(); 574 void cqo();
535 575
536 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. 576 // Divide rdx:rax by src. Quotient in rax, remainder in rdx.
537 void idiv(Register src); 577 void idiv(Register src);
538 578
539 void imul(Register dst, Register src); 579 void imul(Register dst, Register src);
540 void imul(Register dst, const Operand& src); 580 void imul(Register dst, const Operand& src);
541 // Performs the operation dst = src * imm. 581 // Performs the operation dst = src * imm.
542 void imul(Register dst, Register src, Immediate imm); 582 void imul(Register dst, Register src, Immediate imm);
583 // Multiply 32 bit registers
584 void imull(Register dst, Register src);
543 585
544 void incq(Register dst); 586 void incq(Register dst);
545 void incq(const Operand& dst); 587 void incq(const Operand& dst);
546 void incl(const Operand& dst); 588 void incl(const Operand& dst);
547 589
548 void lea(Register dst, const Operand& src); 590 void lea(Register dst, const Operand& src);
549 591
550 // Multiply rax by src, put the result in rdx:rax. 592 // Multiply rax by src, put the result in rdx:rax.
551 void mul(Register src); 593 void mul(Register src);
552 594
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597 } 639 }
598 640
599 void shl(Register dst, Immediate shift_amount) { 641 void shl(Register dst, Immediate shift_amount) {
600 shift(dst, shift_amount, 0x4); 642 shift(dst, shift_amount, 0x4);
601 } 643 }
602 644
603 void shl(Register dst) { 645 void shl(Register dst) {
604 shift(dst, 0x4); 646 shift(dst, 0x4);
605 } 647 }
606 648
649 void shll(Register dst) {
650 shift_32(dst, 0x4);
651 }
652
607 void shr(Register dst, Immediate shift_amount) { 653 void shr(Register dst, Immediate shift_amount) {
608 shift(dst, shift_amount, 0x5); 654 shift(dst, shift_amount, 0x5);
609 } 655 }
610 656
611 void shr(Register dst) { 657 void shr(Register dst) {
612 shift(dst, 0x5); 658 shift(dst, 0x5);
613 } 659 }
614 660
661 void shrl(Register dst) {
662 shift_32(dst, 0x5);
663 }
664
615 void store_rax(void* dst, RelocInfo::Mode mode); 665 void store_rax(void* dst, RelocInfo::Mode mode);
616 void store_rax(ExternalReference ref); 666 void store_rax(ExternalReference ref);
617 667
618 void subq(Register dst, Register src) { 668 void subq(Register dst, Register src) {
619 arithmetic_op(0x2B, dst, src); 669 arithmetic_op(0x2B, dst, src);
620 } 670 }
621 671
622 void subq(Register dst, const Operand& src) { 672 void subq(Register dst, const Operand& src) {
623 arithmetic_op(0x2B, dst, src); 673 arithmetic_op(0x2B, dst, src);
624 } 674 }
625 675
626 void subq(const Operand& dst, Register src) { 676 void subq(const Operand& dst, Register src) {
627 arithmetic_op(0x29, src, dst); 677 arithmetic_op(0x29, src, dst);
628 } 678 }
629 679
630 void subq(Register dst, Immediate src) { 680 void subq(Register dst, Immediate src) {
631 immediate_arithmetic_op(0x5, dst, src); 681 immediate_arithmetic_op(0x5, dst, src);
632 } 682 }
633 683
634 void subq(const Operand& dst, Immediate src) { 684 void subq(const Operand& dst, Immediate src) {
635 immediate_arithmetic_op(0x5, dst, src); 685 immediate_arithmetic_op(0x5, dst, src);
636 } 686 }
637 687
688 void subl(Register dst, Register src) {
689 arithmetic_op_32(0x2B, dst, src);
690 }
691
638 void subl(const Operand& dst, Immediate src) { 692 void subl(const Operand& dst, Immediate src) {
639 immediate_arithmetic_op_32(0x5, dst, src); 693 immediate_arithmetic_op_32(0x5, dst, src);
640 } 694 }
641 695
642 void testb(Register reg, Immediate mask); 696 void testb(Register reg, Immediate mask);
643 void testb(const Operand& op, Immediate mask); 697 void testb(const Operand& op, Immediate mask);
644 void testl(Register reg, Immediate mask); 698 void testl(Register reg, Immediate mask);
645 void testl(const Operand& op, Immediate mask); 699 void testl(const Operand& op, Immediate mask);
646 void testq(const Operand& op, Register reg); 700 void testq(const Operand& op, Register reg);
647 void testq(Register dst, Register src); 701 void testq(Register dst, Register src);
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763 void ffree(int i = 0); 817 void ffree(int i = 0);
764 818
765 void ftst(); 819 void ftst();
766 void fucomp(int i); 820 void fucomp(int i);
767 void fucompp(); 821 void fucompp();
768 void fcompp(); 822 void fcompp();
769 void fnstsw_ax(); 823 void fnstsw_ax();
770 void fwait(); 824 void fwait();
771 void fnclex(); 825 void fnclex();
772 826
827 void fsin();
828 void fcos();
829
773 void frndint(); 830 void frndint();
774 831
775 // SSE2 instructions 832 // SSE2 instructions
776 void cvttss2si(Register dst, const Operand& src); 833 void cvttss2si(Register dst, const Operand& src);
777 void cvttsd2si(Register dst, const Operand& src); 834 void cvttsd2si(Register dst, const Operand& src);
778 835
779 void cvtsi2sd(XMMRegister dst, const Operand& src); 836 void cvtsi2sd(XMMRegister dst, const Operand& src);
780 837
781 void addsd(XMMRegister dst, XMMRegister src); 838 void addsd(XMMRegister dst, XMMRegister src);
782 void subsd(XMMRegister dst, XMMRegister src); 839 void subsd(XMMRegister dst, XMMRegister src);
783 void mulsd(XMMRegister dst, XMMRegister src); 840 void mulsd(XMMRegister dst, XMMRegister src);
784 void divsd(XMMRegister dst, XMMRegister src); 841 void divsd(XMMRegister dst, XMMRegister src);
785 842
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952 } 1009 }
953 1010
954 // Emit the code-object-relative offset of the label's position 1011 // Emit the code-object-relative offset of the label's position
955 inline void emit_code_relative_offset(Label* label); 1012 inline void emit_code_relative_offset(Label* label);
956 1013
957 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, 1014 // Emit machine code for one of the operations ADD, ADC, SUB, SBC,
958 // AND, OR, XOR, or CMP. The encodings of these operations are all 1015 // AND, OR, XOR, or CMP. The encodings of these operations are all
959 // similar, differing just in the opcode or in the reg field of the 1016 // similar, differing just in the opcode or in the reg field of the
960 // ModR/M byte. 1017 // ModR/M byte.
961 void arithmetic_op(byte opcode, Register dst, Register src); 1018 void arithmetic_op(byte opcode, Register dst, Register src);
1019 void arithmetic_op_32(byte opcode, Register dst, Register src);
962 void arithmetic_op(byte opcode, Register reg, const Operand& op); 1020 void arithmetic_op(byte opcode, Register reg, const Operand& op);
963 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); 1021 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src);
964 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); 1022 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src);
965 // Operate on a 32-bit word in memory. 1023 // Operate on a 32-bit word in memory or register.
966 void immediate_arithmetic_op_32(byte subcode, 1024 void immediate_arithmetic_op_32(byte subcode,
967 const Operand& dst, 1025 const Operand& dst,
968 Immediate src); 1026 Immediate src);
1027 void immediate_arithmetic_op_32(byte subcode,
1028 Register dst,
1029 Immediate src);
969 // Operate on a byte in memory. 1030 // Operate on a byte in memory.
970 void immediate_arithmetic_op_8(byte subcode, 1031 void immediate_arithmetic_op_8(byte subcode,
971 const Operand& dst, 1032 const Operand& dst,
972 Immediate src); 1033 Immediate src);
973 // Emit machine code for a shift operation. 1034 // Emit machine code for a shift operation.
974 void shift(Register dst, Immediate shift_amount, int subcode); 1035 void shift(Register dst, Immediate shift_amount, int subcode);
975 // Shift dst by cl % 64 bits. 1036 // Shift dst by cl % 64 bits.
976 void shift(Register dst, int subcode); 1037 void shift(Register dst, int subcode);
1038 void shift_32(Register dst, int subcode);
977 1039
978 // void emit_farith(int b1, int b2, int i); 1040 void emit_farith(int b1, int b2, int i);
979 1041
980 // labels 1042 // labels
981 // void print(Label* L); 1043 // void print(Label* L);
982 void bind_to(Label* L, int pos); 1044 void bind_to(Label* L, int pos);
983 void link_to(Label* L, Label* appendix); 1045 void link_to(Label* L, Label* appendix);
984 1046
985 // record reloc info for current pc_ 1047 // record reloc info for current pc_
986 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); 1048 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
987 1049
988 friend class CodePatcher; 1050 friend class CodePatcher;
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1035 private: 1097 private:
1036 Assembler* assembler_; 1098 Assembler* assembler_;
1037 #ifdef DEBUG 1099 #ifdef DEBUG
1038 int space_before_; 1100 int space_before_;
1039 #endif 1101 #endif
1040 }; 1102 };
1041 1103
1042 } } // namespace v8::internal 1104 } } // namespace v8::internal
1043 1105
1044 #endif // V8_X64_ASSEMBLER_X64_H_ 1106 #endif // V8_X64_ASSEMBLER_X64_H_
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