Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(207)

Side by Side Diff: src/constants-arm.h

Issue 12427: Merge regexp2000 back into bleeding_edge (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 12 years ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 // Copyright 2008 the V8 project authors. All rights reserved. 1 // Copyright 2008 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 102 matching lines...) Expand 10 before | Expand all | Expand 10 after
113 typedef int32_t instr_t; 113 typedef int32_t instr_t;
114 114
115 115
116 // The class Instr enables access to individual fields defined in the ARM 116 // The class Instr enables access to individual fields defined in the ARM
117 // architecture instruction set encoding as described in figure A3-1. 117 // architecture instruction set encoding as described in figure A3-1.
118 // 118 //
119 // Example: Test whether the instruction at ptr does set the condition code 119 // Example: Test whether the instruction at ptr does set the condition code
120 // bits. 120 // bits.
121 // 121 //
122 // bool InstructionSetsConditionCodes(byte* ptr) { 122 // bool InstructionSetsConditionCodes(byte* ptr) {
123 // Instr *instr = Instr::At(ptr); 123 // Instr* instr = Instr::At(ptr);
124 // int type = instr->TypeField(); 124 // int type = instr->TypeField();
125 // return ((type == 0) || (type == 1)) && instr->HasS(); 125 // return ((type == 0) || (type == 1)) && instr->HasS();
126 // } 126 // }
127 // 127 //
128 class Instr { 128 class Instr {
129 public: 129 public:
130 enum { 130 enum {
131 kInstrSize = 4, 131 kInstrSize = 4,
132 kPCReadOffset = 8 132 kPCReadOffset = 8
133 }; 133 };
(...skipping 91 matching lines...) Expand 10 before | Expand all | Expand 10 after
225 225
226 private: 226 private:
227 // We need to prevent the creation of instances of class Instr. 227 // We need to prevent the creation of instances of class Instr.
228 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); 228 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
229 }; 229 };
230 230
231 231
232 } } // namespace assembler::arm 232 } } // namespace assembler::arm
233 233
234 #endif // V8_CONSTANTS_ARM_H_ 234 #endif // V8_CONSTANTS_ARM_H_
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698