Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(74)

Side by Side Diff: src/x64/assembler-x64.h

Issue 123018: X64 implementation starts using virtual frame and register allocators. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 11 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/SConscript ('k') | src/x64/assembler-x64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 464 matching lines...) Expand 10 before | Expand all | Expand 10 after
475 } 475 }
476 476
477 void addq(const Operand& dst, Immediate src) { 477 void addq(const Operand& dst, Immediate src) {
478 immediate_arithmetic_op(0x0, dst, src); 478 immediate_arithmetic_op(0x0, dst, src);
479 } 479 }
480 480
481 void addl(const Operand& dst, Immediate src) { 481 void addl(const Operand& dst, Immediate src) {
482 immediate_arithmetic_op_32(0x0, dst, src); 482 immediate_arithmetic_op_32(0x0, dst, src);
483 } 483 }
484 484
485 void cmpb(const Operand& dst, Immediate src) {
486 immediate_arithmetic_op_8(0x7, dst, src);
487 }
488
485 void cmpq(Register dst, Register src) { 489 void cmpq(Register dst, Register src) {
486 arithmetic_op(0x3B, dst, src); 490 arithmetic_op(0x3B, dst, src);
487 } 491 }
488 492
489 void cmpq(Register dst, const Operand& src) { 493 void cmpq(Register dst, const Operand& src) {
490 arithmetic_op(0x3B, dst, src); 494 arithmetic_op(0x3B, dst, src);
491 } 495 }
492 496
493 void cmpq(const Operand& dst, Register src) { 497 void cmpq(const Operand& dst, Register src) {
494 arithmetic_op(0x39, src, dst); 498 arithmetic_op(0x39, src, dst);
(...skipping 456 matching lines...) Expand 10 before | Expand all | Expand 10 after
951 inline void emit_code_relative_offset(Label* label); 955 inline void emit_code_relative_offset(Label* label);
952 956
953 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, 957 // Emit machine code for one of the operations ADD, ADC, SUB, SBC,
954 // AND, OR, XOR, or CMP. The encodings of these operations are all 958 // AND, OR, XOR, or CMP. The encodings of these operations are all
955 // similar, differing just in the opcode or in the reg field of the 959 // similar, differing just in the opcode or in the reg field of the
956 // ModR/M byte. 960 // ModR/M byte.
957 void arithmetic_op(byte opcode, Register dst, Register src); 961 void arithmetic_op(byte opcode, Register dst, Register src);
958 void arithmetic_op(byte opcode, Register reg, const Operand& op); 962 void arithmetic_op(byte opcode, Register reg, const Operand& op);
959 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); 963 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src);
960 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); 964 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src);
965 // Operate on a 32-bit word in memory.
961 void immediate_arithmetic_op_32(byte subcode, 966 void immediate_arithmetic_op_32(byte subcode,
962 const Operand& dst, 967 const Operand& dst,
963 Immediate src); 968 Immediate src);
969 // Operate on a byte in memory.
970 void immediate_arithmetic_op_8(byte subcode,
971 const Operand& dst,
972 Immediate src);
964 // Emit machine code for a shift operation. 973 // Emit machine code for a shift operation.
965 void shift(Register dst, Immediate shift_amount, int subcode); 974 void shift(Register dst, Immediate shift_amount, int subcode);
966 // Shift dst by cl % 64 bits. 975 // Shift dst by cl % 64 bits.
967 void shift(Register dst, int subcode); 976 void shift(Register dst, int subcode);
968 977
969 // void emit_farith(int b1, int b2, int i); 978 // void emit_farith(int b1, int b2, int i);
970 979
971 // labels 980 // labels
972 // void print(Label* L); 981 // void print(Label* L);
973 void bind_to(Label* L, int pos); 982 void bind_to(Label* L, int pos);
(...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after
1026 private: 1035 private:
1027 Assembler* assembler_; 1036 Assembler* assembler_;
1028 #ifdef DEBUG 1037 #ifdef DEBUG
1029 int space_before_; 1038 int space_before_;
1030 #endif 1039 #endif
1031 }; 1040 };
1032 1041
1033 } } // namespace v8::internal 1042 } } // namespace v8::internal
1034 1043
1035 #endif // V8_X64_ASSEMBLER_X64_H_ 1044 #endif // V8_X64_ASSEMBLER_X64_H_
OLDNEW
« no previous file with comments | « src/SConscript ('k') | src/x64/assembler-x64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698