Add multiplication and division to x64 assembler. Add emit_modrm() function.

src/x64/assembler-x64.cc

 // Copyright 2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 324 matching lines @@
 
   ASSERT(!overflow());
 }
 
 
 void Assembler::emit_operand(int rm, const Operand& adr) {
   ASSERT_EQ(rm & 0x07, rm);
   const unsigned length = adr.len_;
   ASSERT(length > 0);
 
-  // Emit updated ModRM byte containing the given register.
+  // Emit updated ModR/M byte containing the given register.
   pc_[0] = (adr.buf_[0] & ~0x38) | (rm << 3);
 
   // Emit the rest of the encoded operand.
   for (unsigned i = 1; i < length; i++) pc_[i] = adr.buf_[i];
   pc_ += length;
 }
 
 
 // Assembler Instruction implementations
 
 void Assembler::arithmetic_op(byte opcode, Register reg, const Operand& op) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(reg, op);
   emit(opcode);
   emit_operand(reg, op);
 }
 
 
 void Assembler::arithmetic_op(byte opcode, Register dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst, src);
   emit(opcode);
-  emit(0xC0 | (dst.code() & 0x7) << 3 | (src.code() & 0x7));
+  emit_modrm(dst, src);
 }
 
 void Assembler::immediate_arithmetic_op(byte subcode,
                                         Register dst,
                                         Immediate src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   if (is_int8(src.value_)) {
     emit(0x83);
-    emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+    emit_modrm(subcode, dst);
     emit(src.value_);
   } else if (dst.is(rax)) {
     emit(0x05 | (subcode << 3));
     emitl(src.value_);
   } else {
     emit(0x81);
-    emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+    emit_modrm(subcode, dst);
     emitl(src.value_);
   }
 }
 
 void Assembler::immediate_arithmetic_op(byte subcode,
                                         const Operand& dst,
                                         Immediate src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   if (is_int8(src.value_)) {
     emit(0x83);
     emit_operand(Register::toRegister(subcode), dst);
     emit(src.value_);
   } else {
     emit(0x81);
     emit_operand(Register::toRegister(subcode), dst);
     emitl(src.value_);
   }
 }
 
 
 void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   ASSERT(is_uint6(shift_amount.value_));  // illegal shift count
   if (shift_amount.value_ == 1) {
     emit_rex_64(dst);
     emit(0xD1);
-    emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+    emit_modrm(subcode, dst);
   } else {
     emit_rex_64(dst);
     emit(0xC1);
-    emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+    emit_modrm(subcode, dst);
     emit(shift_amount.value_);
   }
 }
 
 
 void Assembler::shift(Register dst, int subcode) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xD3);
-  emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+  emit_modrm(subcode, dst);
 }
 
 
 void Assembler::bt(const Operand& dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(src, dst);
   emit(0x0F);
   emit(0xA3);
   emit_operand(src, dst);
@@ skipping 28 matching lines @@
     emitl(current);
     L->link_to(current);
   }
 }
 
 
 void Assembler::call(Register adr) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   // Opcode: FF /2 r64
-  if (!is_uint3(adr.code())) {
+  if (adr.code() > 7) {
     emit_rex_64(adr);
   }
   emit(0xFF);
-  emit(0xD0 | (adr.code() & 0x07));
+  emit_modrm(0x2, adr);
 }
 
 
 void Assembler::cpuid() {
   ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CPUID));
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0x0F);
   emit(0xA2);
 }
 
 
 void Assembler::cqo() {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64();
   emit(0x99);
 }
 
 
 void Assembler::dec(Register dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xFF);
-  emit(0xC8 | (dst.code() & 0x7));
+  emit_modrm(0x1, dst);
 }
 
 
 void Assembler::dec(const Operand& dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xFF);
   emit_operand(1, dst);
 }
 
 
 void Assembler::enter(Immediate size) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0xC8);
   emitw(size.value_);  // 16 bit operand, always.
   emit(0);
 }
 
 
 void Assembler::hlt() {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0xF4);
 }
 
 
+void Assembler::idiv(Register src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(src);
+  emit(0xF7);
+  emit_modrm(0x7, src);
+}
+
+
+void Assembler::imul(Register dst, const Operand& src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(dst, src);
+  emit(0x0F);
+  emit(0xAF);
+  emit_operand(dst, src);
+}
+
+
+void Assembler::imul(Register dst, Register src, Immediate imm) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(dst, src);
+  if (is_int8(imm.value_)) {
+    emit(0x6B);
+    emit_modrm(dst, src);
+    emit(imm.value_);
+  } else {
+    emit(0x69);
+    emit_modrm(dst, src);
+    emitl(imm.value_);
+  }
+}
+
+
 void Assembler::inc(Register dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xFF);
-  emit(0xC0 | (dst.code() & 0x7));
+  emit_modrm(0x0, dst);
 }
 
 
 void Assembler::inc(const Operand& dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xFF);
   emit_operand(0, dst);
 }
@@ skipping 70 matching lines @@
     emitl(current);
     L->link_to(current);
   }
 }
 
 
 void Assembler::jmp(Register target) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   // Opcode FF/4 r64
-  if (!is_uint3(target.code())) {
+  if (target.code() > 7) {
     emit_rex_64(target);
   }
   emit(0xFF);
-  emit(0xE0 | target.code() & 0x07);
+  emit_modrm(0x4, target);
 }
 
 
 void Assembler::lea(Register dst, const Operand& src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst, src);
   emit(0x8D);
   emit_operand(dst, src);
 }
 
 
 void Assembler::leave() {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0xC9);
 }
 
 
+void Assembler::movb(Register dst, const Operand& src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_32(dst, src);
+  emit(0x8A);
+  emit_operand(dst, src);
+}
+
+void Assembler::movb(Register dst, Immediate imm) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_32(dst);
+  emit(0xC6);
+  emit_modrm(0x0, dst);
+  emit(imm.value_);
+}
+
+void Assembler::movb(const Operand& dst, Register src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_32(src, dst);
+  emit(0x88);
+  emit_operand(src, dst);
+}
+
 void Assembler::movl(Register dst, const Operand& src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_optional_rex_32(dst, src);
   emit(0x8B);
   emit_operand(dst, src);
 }
 
 
 void Assembler::movl(Register dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_optional_rex_32(dst, src);
   emit(0x8B);
-  emit(0xC0 | (dst.code() & 0x7) << 3 | (src.code() & 0x7));
+  emit_modrm(dst, src);
 }
 
 
 void Assembler::movl(const Operand& dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_optional_rex_32(src, dst);
   emit(0x89);
   emit_operand(src, dst);
 }
 
 
 void Assembler::movl(Register dst, Immediate value) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_optional_rex_32(dst);
   emit(0xC7);
-  emit(0xC0 | (dst.code() & 0x7));
+  emit_modrm(0x0, dst);
   emit(value);  // Only 32-bit immediates are possible, not 8-bit immediates.
 }
 
 
 void Assembler::movq(Register dst, const Operand& src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst, src);
   emit(0x8B);
   emit_operand(dst, src);
 }
 
 
 void Assembler::movq(Register dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst, src);
   emit(0x8B);
-  emit(0xC0 | (dst.code() & 0x7) << 3 | (src.code() & 0x7));
+  emit_modrm(dst, src);
 }
 
 
 void Assembler::movq(Register dst, Immediate value) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xC7);
-  emit(0xC0 | (dst.code() & 0x7));
+  emit_modrm(0x0, dst);
   emit(value);  // Only 32-bit immediates are possible, not 8-bit immediates.
 }
 
 
 void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
-  emit(0xB8 | (dst.code() & 0x7));
+  emit(0xB8 | (dst.code() & 0x7));  // Not a ModR/M byte.
   emitq(value, rmode);
 }
 
 
 void Assembler::movq(const Operand& dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(src, dst);
   emit(0x89);
   emit_operand(src, dst);
 }
 
 
+void Assembler::mul(Register src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(src);
+  emit(0xF7);
+  emit_modrm(0x4, src);
+}
+
+
 void Assembler::neg(Register dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xF7);
-  emit(0xC0 | (0x3 << 3) | (dst.code() & 0x7));
+  emit_modrm(0x3, dst);
 }
 
 
 void Assembler::neg(const Operand& dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xF7);
   emit_operand(3, dst);
 }
 
 
 void Assembler::nop() {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0x90);
 }
 
 
 void Assembler::not_(Register dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xF7);
-  emit(0xC0 | (0x2 << 3) | (dst.code() & 0x7));
+  emit_modrm(0x2, dst);
 }
 
 
 void Assembler::not_(const Operand& dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);
   emit(0xF7);
   emit_operand(2, dst);
 }
@@ skipping 82 matching lines @@
     emit(0x00);
     emit(0x00);
     return;
   }
 }
 
 
 void Assembler::pop(Register dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
-  if (dst.code() & 0x8) {
+  if (dst.code() > 7) {
     emit_rex_64(dst);
   }
   emit(0x58 | (dst.code() & 0x7));
 }
 
 
 void Assembler::pop(const Operand& dst) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(dst);  // Could be omitted in some cases.
   emit(0x8F);
   emit_operand(0, dst);
 }
 
 
 void Assembler::popfq() {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0x9D);
 }
 
 
 void Assembler::push(Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
-  if (src.code() & 0x8) {
+  if (src.code() > 7) {
     emit_rex_64(src);
   }
   emit(0x50 | (src.code() & 0x7));
 }
 
 
 void Assembler::push(const Operand& src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_rex_64(src);  // Could be omitted in some cases.
@@ skipping 22 matching lines @@
 }
 
 
 void Assembler::rcl(Register dst, uint8_t imm8) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   ASSERT(is_uint6(imm8));  // illegal shift count
   if (imm8 == 1) {
     emit_rex_64(dst);
     emit(0xD1);
-    emit(0xD0 | (dst.code() & 0x7));
+    emit_modrm(0x2, dst);
   } else {
     emit_rex_64(dst);
     emit(0xC1);
-    emit(0xD0 | (dst.code() & 0x7));
+    emit_modrm(0x2, dst);
     emit(imm8);
   }
 }
 
 
 void Assembler::ret(int imm16) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   ASSERT(is_uint16(imm16));
   if (imm16 == 0) {
     emit(0xC3);
   } else {
     emit(0xC2);
     emit(imm16 & 0xFF);
     emit((imm16 >> 8) & 0xFF);
   }
 }
 
 
+void Assembler::shld(Register dst, Register src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(src, dst);
+  emit(0x0F);
+  emit(0xA5);
+  emit_modrm(src, dst);
+}
+
+
+void Assembler::shrd(Register dst, Register src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(src, dst);
+  emit(0x0F);
+  emit(0xAD);
+  emit_modrm(src, dst);
+}
+
+
 void Assembler::xchg(Register dst, Register src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   if (src.is(rax) || dst.is(rax)) {  // Single-byte encoding
     Register other = src.is(rax) ? dst : src;
     emit_rex_64(other);
     emit(0x90 | (other.code() & 0x7));
   } else {
     emit_rex_64(src, dst);
     emit(0x87);
-    emit(0xC0 | (src.code() & 0x7) << 3 | (dst.code() & 0x7));
+    emit_modrm(src, dst);
   }
 }
 
 
 void Assembler::testb(Register reg, Immediate mask) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   if (reg.is(rax)) {
     emit(0xA8);
     emit(mask);
   } else {
-    if (reg.code() & 0x8) {
-      emit_rex_32(rax, reg);
+    if (reg.code() > 3) {
+      // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
+      emit_rex_32(reg);
     }
     emit(0xF6);
-    emit(0xC0 | (reg.code() & 0x3));
+    emit_modrm(0x0, reg);
     emit(mask.value_);  // Low byte emitted.
   }
 }
 
 
 void Assembler::testb(const Operand& op, Immediate mask) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_optional_rex_32(rax, op);
   emit(0xF6);
   emit_operand(rax, op);  // Operation code 0
   emit(mask.value_);  // Low byte emitted.
 }
 
 
 void Assembler::testl(Register reg, Immediate mask) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   if (reg.is(rax)) {
     emit(0xA9);
     emit(mask);
   } else {
     emit_optional_rex_32(rax, reg);
     emit(0xF7);
-    emit(0xC0 | (reg.code() & 0x3));
+    emit_modrm(0x0, reg);
     emit(mask);
   }
 }
 
 
 void Assembler::testl(const Operand& op, Immediate mask) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit_optional_rex_32(rax, op);
   emit(0xF7);
   emit_operand(rax, op);  // Operation code 0
   emit(mask);
 }
 
 
+void Assembler::testq(const Operand& op, Register reg) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(reg, op);
+  emit(0x85);
+  emit_operand(reg, op);
+}
+
+
+void Assembler::testq(Register dst, Register src) {
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  emit_rex_64(dst, src);
+  emit(0x85);
+  emit_modrm(dst, src);
+}
+
+
 // Relocation information implementations
 
 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
   ASSERT(rmode != RelocInfo::NONE);
   // Don't record external references unless the heap will be serialized.
   if (rmode == RelocInfo::EXTERNAL_REFERENCE &&
       !Serializer::enabled() &&
       !FLAG_debug_code) {
     return;
   }
@@ skipping 327 matching lines @@
   UNIMPLEMENTED();
   return NULL;
 }
 
 byte* JavaScriptFrame::GetCallerStackPointer() const {
   UNIMPLEMENTED();
   return NULL;
 }
 
 } }  // namespace v8::internal