X64: Added implementations of Set(..., Immediate) to macro assembler.

src/x64/assembler-x64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 22 matching lines @@
 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 
 // A lightweight X64 Assembler.
 
 #ifndef V8_X64_ASSEMBLER_X64_H_
 #define V8_X64_ASSEMBLER_X64_H_
 
 namespace v8 {
 namespace internal {
 
+// Utility functions
+
+// Test whether a 64-bit value is in a specific range.
+static inline bool is_uint32(int64_t x) {
+  static const unsigned int kUInt32Mask = 0xffffffff;

[William Hesse, 2009/06/02 13:21:58]

Please use the V8_UINT64_C() macro to define a 64-bit mask.  Relying on the fact
that it gets extended to 64 bits from an unsigned is confusing.

In fact, for consistency, copy the is_intn and is_uintn functions from
assembler.h, using 64-bit types.  Either instantiate is_uint32 directly, or
rename is_uintn to is_uint64n, since you can't overload on integer type
reliably, I think.

+  return x == x & kUInt32Mask;
+}
+
+static inline bool is_int32(int64_t x) {
+  static const int kMinIntValue = -0x80000000;
+  return is_uint32(x - kMinIntValue);
+}
+
 // CPU Registers.
 //
 // 1) We would prefer to use an enum, but enum values are assignment-
 // compatible with int, which has caused code-generation bugs.
 //
 // 2) We would prefer to use a class instead of a struct but we don't like
 // the register initialization to depend on the particular initialization
 // order (which appears to be different on OS X, Linux, and Windows for the
 // installed versions of C++ we tried). Using a struct permits C-style
 // "initialization". Also, the Register objects cannot be const as this
@@ skipping 349 matching lines @@
   void pop(const Operand& dst);
 
   void enter(const Immediate& size);
   void leave();
 
   // Moves
   void movb(Register dst, const Operand& src);
   void movb(const Operand& dst, int8_t imm8);
   void movb(const Operand& dst, Register src);
 
-  void movq(Register dst, int32_t imm32);
+  // Load a 32-bit immediate value, zero-extended to 64 bits.
+  void movl(Register dst, Immediate imm32);
+
+  void movq(Register dst, const Operand& src);
+  // Sign extends immediate 32-bit value to 64 bits.
   void movq(Register dst, Immediate x);
-  void movq(Register dst, const Operand& src);
   void movq(Register dst, Register src);
-  void movq(const Operand& dst, const Immediate& x);
+
+  // Move 64 bit register value to 64-bit memory location.
   void movq(const Operand& dst, Register src);
 
   // New x64 instructions to load a 64-bit immediate into a register.
   // All 64-bit immediates must have a relocation mode.
   void movq(Register dst, void* ptr, RelocInfo::Mode rmode);
   void movq(Register dst, int64_t value, RelocInfo::Mode rmode);
   void movq(Register dst, const char* s, RelocInfo::Mode rmode);
   void movq(Register dst, const ExternalReference& ext, RelocInfo::Mode rmode);
   void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode);
 
+
   // New x64 instruction to load from an immediate 64-bit pointer into RAX.
   void load_rax(void* ptr, RelocInfo::Mode rmode);
 
   void movsx_b(Register dst, const Operand& src);
 
   void movsx_w(Register dst, const Operand& src);
 
   void movzx_b(Register dst, const Operand& src);
 
   void movzx_w(Register dst, const Operand& src);
@@ skipping 406 matching lines @@
 
   // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B.
   // REX.W is clear.
   inline void emit_rex_32(Register reg, Register rm_reg);
 
   // The high bit of reg is used for REX.R, the high bit of op's base
   // register is used for REX.B, and the high bit of op's index register
   // is used for REX.X.  REX.W is cleared.
   inline void emit_rex_32(Register reg, const Operand& op);
 
+  // High bit of rm_reg goes to REX.B.
+  // REX.W, REX.R and REX.X are clear.
+  inline void emit_rex_32(Register rm_reg);
+
+  // High bit of base goes to REX.B and high bit of index to REX.X.
+  // REX.W and REX.R are clear.
+  inline void emit_rex_32(const Operand &);

[William Hesse, 2009/06/03 10:36:09]

Operand&, not Operand &

+
   // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B.
   // REX.W is cleared.  If no REX bits are set, no byte is emitted.
   inline void emit_optional_rex_32(Register reg, Register rm_reg);
 
   // The high bit of reg is used for REX.R, the high bit of op's base
   // register is used for REX.B, and the high bit of op's index register
   // is used for REX.X.  REX.W is cleared.  If no REX bits are set, nothing
   // is emitted.
   inline void emit_optional_rex_32(Register reg, const Operand& op);
 
+  // Optionally do as emit_rex_32(Register) if the register number has
+  // the high bit set.
+  inline void emit_optional_rex_32(Register rm_reg);
+
+  // Optionally do as emit_rex_32(const Operand&) if the operand register
+  // numbers have a high bit set.
+  inline void emit_optional_rex_32(const Operand& op);
+
+
   // Emit the Mod/RM byte, and optionally the SIB byte and
   // 1- or 4-byte offset for a memory operand.  Also encodes
   // the second operand of the operation, a register or operation
   // subcode, into the Mod/RM byte.
   void emit_operand(Register reg, const Operand& adr) {
     emit_operand(reg.code() & 0x07, adr);
   }
 
   // Emit the Mod/RM byte, and optionally the SIB byte and
   // 1- or 4-byte offset for a memory operand.  Also used to encode
@@ skipping 72 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_X64_ASSEMBLER_X64_H_