Index: src/x64/assembler-x64.cc |
=================================================================== |
--- src/x64/assembler-x64.cc (revision 2138) |
+++ src/x64/assembler-x64.cc (working copy) |
@@ -451,6 +451,24 @@ |
} |
+void Assembler::immediate_arithmetic_op_32(byte subcode, |
+ const Operand& dst, |
+ Immediate src) { |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ emit_optional_rex_32(dst); |
+ if (is_int8(src.value_)) { |
+ emit(0x83); |
+ emit_operand(Register::toRegister(subcode), dst); |
+ emit(src.value_); |
+ } else { |
+ emit(0x81); |
+ emit_operand(Register::toRegister(subcode), dst); |
+ emitl(src.value_); |
+ } |
+} |
+ |
+ |
void Assembler::shift(Register dst, Immediate shift_amount, int subcode) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -530,15 +548,6 @@ |
} |
-void Assembler::cpuid() { |
- ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CPUID)); |
- EnsureSpace ensure_space(this); |
- last_pc_ = pc_; |
- emit(0x0F); |
- emit(0xA2); |
-} |
- |
- |
void Assembler::call(const Operand& op) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -549,6 +558,15 @@ |
} |
+void Assembler::cpuid() { |
+ ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CPUID)); |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ emit(0x0F); |
+ emit(0xA2); |
+} |
+ |
+ |
void Assembler::cqo() { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -557,7 +575,7 @@ |
} |
-void Assembler::dec(Register dst) { |
+void Assembler::decq(Register dst) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
emit_rex_64(dst); |
@@ -566,7 +584,7 @@ |
} |
-void Assembler::dec(const Operand& dst) { |
+void Assembler::decq(const Operand& dst) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
emit_rex_64(dst); |
@@ -575,6 +593,15 @@ |
} |
+void Assembler::decl(const Operand& dst) { |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ emit_optional_rex_32(dst); |
+ emit(0xFF); |
+ emit_operand(1, dst); |
+} |
+ |
+ |
void Assembler::enter(Immediate size) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -626,7 +653,7 @@ |
} |
-void Assembler::inc(Register dst) { |
+void Assembler::incq(Register dst) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
emit_rex_64(dst); |
@@ -635,7 +662,7 @@ |
} |
-void Assembler::inc(const Operand& dst) { |
+void Assembler::incq(const Operand& dst) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
emit_rex_64(dst); |
@@ -644,6 +671,15 @@ |
} |
+void Assembler::incl(const Operand& dst) { |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ emit_optional_rex_32(dst); |
+ emit(0xFF); |
+ emit_operand(0, dst); |
+} |
+ |
+ |
void Assembler::int3() { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -812,6 +848,16 @@ |
} |
+void Assembler::movl(const Operand& dst, Immediate value) { |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ emit_optional_rex_32(dst); |
+ emit(0xC7); |
+ emit_operand(0x0, dst); |
+ emit(value); // Only 32-bit immediates are possible, not 8-bit immediates. |
+} |
+ |
+ |
void Assembler::movl(Register dst, Immediate value) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -1132,7 +1178,14 @@ |
} |
} |
+void Assembler::rdtsc() { |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ emit(0x0F); |
+ emit(0x31); |
+} |
+ |
void Assembler::ret(int imm16) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |
@@ -1147,6 +1200,19 @@ |
} |
+void Assembler::setcc(Condition cc, Register reg) { |
+ EnsureSpace ensure_space(this); |
+ last_pc_ = pc_; |
+ ASSERT(0 <= cc && cc < 16); |
+ if (reg.code() > 3) { // Use x64 byte registers, where different. |
+ emit_rex_32(reg); |
+ } |
+ emit(0x0F); |
+ emit(0x90 | cc); |
+ emit_modrm(0x0, reg); |
+} |
+ |
+ |
void Assembler::shld(Register dst, Register src) { |
EnsureSpace ensure_space(this); |
last_pc_ = pc_; |