| OLD | NEW |
| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 378 | 378 |
| 379 | 379 |
| 380 // --------------------------------------------------------------------------- | 380 // --------------------------------------------------------------------------- |
| 381 // Code generation | 381 // Code generation |
| 382 // | 382 // |
| 383 // Function names correspond one-to-one to x64 instruction mnemonics. | 383 // Function names correspond one-to-one to x64 instruction mnemonics. |
| 384 // Unless specified otherwise, instructions operate on 64-bit operands. | 384 // Unless specified otherwise, instructions operate on 64-bit operands. |
| 385 // | 385 // |
| 386 // If we need versions of an assembly instruction that operate on different | 386 // If we need versions of an assembly instruction that operate on different |
| 387 // width arguments, we add a single-letter suffix specifying the width. | 387 // width arguments, we add a single-letter suffix specifying the width. |
| 388 // This is done for the following instructions: mov, cmp. | 388 // This is done for the following instructions: mov, cmp, inc, dec, |
| 389 // add, sub, and test. |
| 389 // There are no versions of these instructions without the suffix. | 390 // There are no versions of these instructions without the suffix. |
| 390 // - Instructions on 8-bit (byte) operands/registers have a trailing 'b'. | 391 // - Instructions on 8-bit (byte) operands/registers have a trailing 'b'. |
| 391 // - Instructions on 16-bit (word) operands/registers have a trailing 'w'. | 392 // - Instructions on 16-bit (word) operands/registers have a trailing 'w'. |
| 392 // - Instructions on 32-bit (doubleword) operands/registers use 'l'. | 393 // - Instructions on 32-bit (doubleword) operands/registers use 'l'. |
| 393 // - Instructions on 64-bit (quadword) operands/registers use 'q'. | 394 // - Instructions on 64-bit (quadword) operands/registers use 'q'. |
| 394 // | 395 // |
| 395 // Some mnemonics, such as "and", are the same as C++ keywords. | 396 // Some mnemonics, such as "and", are the same as C++ keywords. |
| 396 // Naming conflicts with C++ keywords are resolved by adding a trailing '_'. | 397 // Naming conflicts with C++ keywords are resolved by adding a trailing '_'. |
| 397 | 398 |
| 398 // Insert the smallest number of nop instructions | 399 // Insert the smallest number of nop instructions |
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| 416 void leave(); | 417 void leave(); |
| 417 | 418 |
| 418 // Moves | 419 // Moves |
| 419 void movb(Register dst, const Operand& src); | 420 void movb(Register dst, const Operand& src); |
| 420 void movb(Register dst, Immediate imm); | 421 void movb(Register dst, Immediate imm); |
| 421 void movb(const Operand& dst, Register src); | 422 void movb(const Operand& dst, Register src); |
| 422 | 423 |
| 423 void movl(Register dst, Register src); | 424 void movl(Register dst, Register src); |
| 424 void movl(Register dst, const Operand& src); | 425 void movl(Register dst, const Operand& src); |
| 425 void movl(const Operand& dst, Register src); | 426 void movl(const Operand& dst, Register src); |
| 427 void movl(const Operand& dst, Immediate imm); |
| 426 // Load a 32-bit immediate value, zero-extended to 64 bits. | 428 // Load a 32-bit immediate value, zero-extended to 64 bits. |
| 427 void movl(Register dst, Immediate imm32); | 429 void movl(Register dst, Immediate imm32); |
| 428 | 430 |
| 429 void movq(Register dst, int32_t imm32); | 431 void movq(Register dst, int32_t imm32); |
| 430 void movq(Register dst, const Operand& src); | 432 void movq(Register dst, const Operand& src); |
| 431 // Sign extends immediate 32-bit value to 64 bits. | 433 // Sign extends immediate 32-bit value to 64 bits. |
| 432 void movq(Register dst, Immediate x); | 434 void movq(Register dst, Immediate x); |
| 433 void movq(Register dst, Register src); | 435 void movq(Register dst, Register src); |
| 434 | 436 |
| 435 // Move 64 bit register value to 64-bit memory location. | 437 // Move 64 bit register value to 64-bit memory location. |
| 436 void movq(const Operand& dst, Register src); | 438 void movq(const Operand& dst, Register src); |
| 437 // Move sign extended immediate to memory location. | 439 // Move sign extended immediate to memory location. |
| 438 void movq(const Operand& dst, Immediate value); | 440 void movq(const Operand& dst, Immediate value); |
| 439 // New x64 instructions to load a 64-bit immediate into a register. | 441 // New x64 instructions to load a 64-bit immediate into a register. |
| 440 // All 64-bit immediates must have a relocation mode. | 442 // All 64-bit immediates must have a relocation mode. |
| 441 void movq(Register dst, void* ptr, RelocInfo::Mode rmode); | 443 void movq(Register dst, void* ptr, RelocInfo::Mode rmode); |
| 442 void movq(Register dst, int64_t value, RelocInfo::Mode rmode); | 444 void movq(Register dst, int64_t value, RelocInfo::Mode rmode); |
| 443 void movq(Register dst, const char* s, RelocInfo::Mode rmode); | 445 void movq(Register dst, const char* s, RelocInfo::Mode rmode); |
| 444 // Moves the address of the external reference into the register. | 446 // Moves the address of the external reference into the register. |
| 445 void movq(Register dst, ExternalReference ext); | 447 void movq(Register dst, ExternalReference ext); |
| 446 void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode); | 448 void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode); |
| 447 | 449 |
| 448 // New x64 instruction to load from an immediate 64-bit pointer into RAX. | 450 // New x64 instruction to load from an immediate 64-bit pointer into RAX. |
| 449 void load_rax(void* ptr, RelocInfo::Mode rmode); | 451 void load_rax(void* ptr, RelocInfo::Mode rmode); |
| 450 void load_rax(ExternalReference ext); | 452 void load_rax(ExternalReference ext); |
| 451 | 453 |
| 452 void movsx_b(Register dst, const Operand& src); | |
| 453 | |
| 454 void movsx_w(Register dst, const Operand& src); | |
| 455 | |
| 456 void movzx_b(Register dst, const Operand& src); | |
| 457 | |
| 458 void movzx_w(Register dst, const Operand& src); | |
| 459 | |
| 460 // Conditional moves | 454 // Conditional moves |
| 461 void cmov(Condition cc, Register dst, int32_t imm32); | 455 // Implement conditional moves here. |
| 462 void cmov(Condition cc, Register dst, Handle<Object> handle); | |
| 463 void cmov(Condition cc, Register dst, const Operand& src); | |
| 464 | 456 |
| 465 // Exchange two registers | 457 // Exchange two registers |
| 466 void xchg(Register dst, Register src); | 458 void xchg(Register dst, Register src); |
| 467 | 459 |
| 468 // Arithmetics | 460 // Arithmetics |
| 469 void add(Register dst, Register src) { | 461 void addq(Register dst, Register src) { |
| 470 arithmetic_op(0x03, dst, src); | 462 arithmetic_op(0x03, dst, src); |
| 471 } | 463 } |
| 472 | 464 |
| 473 void add(Register dst, const Operand& src) { | 465 void addq(Register dst, const Operand& src) { |
| 474 arithmetic_op(0x03, dst, src); | 466 arithmetic_op(0x03, dst, src); |
| 475 } | 467 } |
| 476 | 468 |
| 477 | 469 |
| 478 void add(const Operand& dst, Register src) { | 470 void addq(const Operand& dst, Register src) { |
| 479 arithmetic_op(0x01, src, dst); | 471 arithmetic_op(0x01, src, dst); |
| 480 } | 472 } |
| 481 | 473 |
| 482 void add(Register dst, Immediate src) { | 474 void addq(Register dst, Immediate src) { |
| 483 immediate_arithmetic_op(0x0, dst, src); | 475 immediate_arithmetic_op(0x0, dst, src); |
| 484 } | 476 } |
| 485 | 477 |
| 486 void add(const Operand& dst, Immediate src) { | 478 void addq(const Operand& dst, Immediate src) { |
| 487 immediate_arithmetic_op(0x0, dst, src); | 479 immediate_arithmetic_op(0x0, dst, src); |
| 488 } | 480 } |
| 489 | 481 |
| 490 void cmp(Register dst, Register src) { | 482 void addl(const Operand& dst, Immediate src) { |
| 483 immediate_arithmetic_op_32(0x0, dst, src); |
| 484 } |
| 485 |
| 486 void cmpq(Register dst, Register src) { |
| 491 arithmetic_op(0x3B, dst, src); | 487 arithmetic_op(0x3B, dst, src); |
| 492 } | 488 } |
| 493 | 489 |
| 494 void cmp(Register dst, const Operand& src) { | 490 void cmpq(Register dst, const Operand& src) { |
| 495 arithmetic_op(0x3B, dst, src); | 491 arithmetic_op(0x3B, dst, src); |
| 496 } | 492 } |
| 497 | 493 |
| 498 void cmp(const Operand& dst, Register src) { | 494 void cmpq(const Operand& dst, Register src) { |
| 499 arithmetic_op(0x39, src, dst); | 495 arithmetic_op(0x39, src, dst); |
| 500 } | 496 } |
| 501 | 497 |
| 502 void cmp(Register dst, Immediate src) { | 498 void cmpq(Register dst, Immediate src) { |
| 503 immediate_arithmetic_op(0x7, dst, src); | 499 immediate_arithmetic_op(0x7, dst, src); |
| 504 } | 500 } |
| 505 | 501 |
| 506 void cmp(const Operand& dst, Immediate src) { | 502 void cmpq(const Operand& dst, Immediate src) { |
| 507 immediate_arithmetic_op(0x7, dst, src); | 503 immediate_arithmetic_op(0x7, dst, src); |
| 508 } | 504 } |
| 509 | 505 |
| 510 void and_(Register dst, Register src) { | 506 void and_(Register dst, Register src) { |
| 511 arithmetic_op(0x23, dst, src); | 507 arithmetic_op(0x23, dst, src); |
| 512 } | 508 } |
| 513 | 509 |
| 514 void and_(Register dst, const Operand& src) { | 510 void and_(Register dst, const Operand& src) { |
| 515 arithmetic_op(0x23, dst, src); | 511 arithmetic_op(0x23, dst, src); |
| 516 } | 512 } |
| 517 | 513 |
| 518 void and_(const Operand& dst, Register src) { | 514 void and_(const Operand& dst, Register src) { |
| 519 arithmetic_op(0x21, src, dst); | 515 arithmetic_op(0x21, src, dst); |
| 520 } | 516 } |
| 521 | 517 |
| 522 void and_(Register dst, Immediate src) { | 518 void and_(Register dst, Immediate src) { |
| 523 immediate_arithmetic_op(0x4, dst, src); | 519 immediate_arithmetic_op(0x4, dst, src); |
| 524 } | 520 } |
| 525 | 521 |
| 526 void and_(const Operand& dst, Immediate src) { | 522 void and_(const Operand& dst, Immediate src) { |
| 527 immediate_arithmetic_op(0x4, dst, src); | 523 immediate_arithmetic_op(0x4, dst, src); |
| 528 } | 524 } |
| 529 | 525 |
| 530 void cmpb(const Operand& op, int8_t imm8); | 526 void decq(Register dst); |
| 531 void cmpb_al(const Operand& op); | 527 void decq(const Operand& dst); |
| 532 void cmpw_ax(const Operand& op); | 528 void decl(const Operand& dst); |
| 533 void cmpw(const Operand& op, Immediate imm16); | |
| 534 | |
| 535 void dec_b(Register dst); | |
| 536 | |
| 537 void dec(Register dst); | |
| 538 void dec(const Operand& dst); | |
| 539 | 529 |
| 540 // Sign-extends rax into rdx:rax. | 530 // Sign-extends rax into rdx:rax. |
| 541 void cqo(); | 531 void cqo(); |
| 542 | 532 |
| 543 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. | 533 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. |
| 544 void idiv(Register src); | 534 void idiv(Register src); |
| 545 | 535 |
| 546 void imul(Register dst, Register src); | 536 void imul(Register dst, Register src); |
| 547 void imul(Register dst, const Operand& src); | 537 void imul(Register dst, const Operand& src); |
| 548 // Performs the operation dst = src * imm. | 538 // Performs the operation dst = src * imm. |
| 549 void imul(Register dst, Register src, Immediate imm); | 539 void imul(Register dst, Register src, Immediate imm); |
| 550 | 540 |
| 551 void inc(Register dst); | 541 void incq(Register dst); |
| 552 void inc(const Operand& dst); | 542 void incq(const Operand& dst); |
| 543 void incl(const Operand& dst); |
| 553 | 544 |
| 554 void lea(Register dst, const Operand& src); | 545 void lea(Register dst, const Operand& src); |
| 555 | 546 |
| 556 // Multiply rax by src, put the result in rdx:rax. | 547 // Multiply rax by src, put the result in rdx:rax. |
| 557 void mul(Register src); | 548 void mul(Register src); |
| 558 | 549 |
| 559 void neg(Register dst); | 550 void neg(Register dst); |
| 560 void neg(const Operand& dst); | 551 void neg(const Operand& dst); |
| 561 | 552 |
| 562 void not_(Register dst); | 553 void not_(Register dst); |
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| 614 shift(dst, shift_amount, 0x5); | 605 shift(dst, shift_amount, 0x5); |
| 615 } | 606 } |
| 616 | 607 |
| 617 void shr(Register dst) { | 608 void shr(Register dst) { |
| 618 shift(dst, 0x5); | 609 shift(dst, 0x5); |
| 619 } | 610 } |
| 620 | 611 |
| 621 void store_rax(void* dst, RelocInfo::Mode mode); | 612 void store_rax(void* dst, RelocInfo::Mode mode); |
| 622 void store_rax(ExternalReference ref); | 613 void store_rax(ExternalReference ref); |
| 623 | 614 |
| 624 void sub(Register dst, Register src) { | 615 void subq(Register dst, Register src) { |
| 625 arithmetic_op(0x2B, dst, src); | 616 arithmetic_op(0x2B, dst, src); |
| 626 } | 617 } |
| 627 | 618 |
| 628 void sub(Register dst, const Operand& src) { | 619 void subq(Register dst, const Operand& src) { |
| 629 arithmetic_op(0x2B, dst, src); | 620 arithmetic_op(0x2B, dst, src); |
| 630 } | 621 } |
| 631 | 622 |
| 632 void sub(const Operand& dst, Register src) { | 623 void subq(const Operand& dst, Register src) { |
| 633 arithmetic_op(0x29, src, dst); | 624 arithmetic_op(0x29, src, dst); |
| 634 } | 625 } |
| 635 | 626 |
| 636 void sub(Register dst, Immediate src) { | 627 void subq(Register dst, Immediate src) { |
| 637 immediate_arithmetic_op(0x5, dst, src); | 628 immediate_arithmetic_op(0x5, dst, src); |
| 638 } | 629 } |
| 639 | 630 |
| 640 void sub(const Operand& dst, Immediate src) { | 631 void subq(const Operand& dst, Immediate src) { |
| 641 immediate_arithmetic_op(0x5, dst, src); | 632 immediate_arithmetic_op(0x5, dst, src); |
| 642 } | 633 } |
| 643 | 634 |
| 635 void subl(const Operand& dst, Immediate src) { |
| 636 immediate_arithmetic_op_32(0x5, dst, src); |
| 637 } |
| 638 |
| 644 void testb(Register reg, Immediate mask); | 639 void testb(Register reg, Immediate mask); |
| 645 void testb(const Operand& op, Immediate mask); | 640 void testb(const Operand& op, Immediate mask); |
| 646 void testl(Register reg, Immediate mask); | 641 void testl(Register reg, Immediate mask); |
| 647 void testl(const Operand& op, Immediate mask); | 642 void testl(const Operand& op, Immediate mask); |
| 648 void testq(const Operand& op, Register reg); | 643 void testq(const Operand& op, Register reg); |
| 649 void testq(Register dst, Register src); | 644 void testq(Register dst, Register src); |
| 650 void testq(Register dst, Immediate mask); | 645 void testq(Register dst, Immediate mask); |
| 651 | 646 |
| 652 void xor_(Register dst, Register src) { | 647 void xor_(Register dst, Register src) { |
| 653 arithmetic_op(0x33, dst, src); | 648 arithmetic_op(0x33, dst, src); |
| 654 } | 649 } |
| 655 | 650 |
| 656 void xor_(Register dst, const Operand& src) { | 651 void xor_(Register dst, const Operand& src) { |
| 657 arithmetic_op(0x33, dst, src); | 652 arithmetic_op(0x33, dst, src); |
| 658 } | 653 } |
| 659 | 654 |
| 660 void xor_(const Operand& dst, Register src) { | 655 void xor_(const Operand& dst, Register src) { |
| 661 arithmetic_op(0x31, src, dst); | 656 arithmetic_op(0x31, src, dst); |
| 662 } | 657 } |
| 663 | 658 |
| 664 void xor_(Register dst, Immediate src) { | 659 void xor_(Register dst, Immediate src) { |
| 665 immediate_arithmetic_op(0x6, dst, src); | 660 immediate_arithmetic_op(0x6, dst, src); |
| 666 } | 661 } |
| 667 | 662 |
| 668 void xor_(const Operand& dst, Immediate src) { | 663 void xor_(const Operand& dst, Immediate src) { |
| 669 immediate_arithmetic_op(0x6, dst, src); | 664 immediate_arithmetic_op(0x6, dst, src); |
| 670 } | 665 } |
| 671 | 666 |
| 672 | |
| 673 // Bit operations. | 667 // Bit operations. |
| 674 void bt(const Operand& dst, Register src); | 668 void bt(const Operand& dst, Register src); |
| 675 void bts(const Operand& dst, Register src); | 669 void bts(const Operand& dst, Register src); |
| 676 | 670 |
| 677 // Miscellaneous | 671 // Miscellaneous |
| 672 void cpuid(); |
| 678 void hlt(); | 673 void hlt(); |
| 679 void int3(); | 674 void int3(); |
| 680 void nop(); | 675 void nop(); |
| 681 void nop(int n); | 676 void nop(int n); |
| 682 void rdtsc(); | 677 void rdtsc(); |
| 683 void ret(int imm16); | 678 void ret(int imm16); |
| 679 void setcc(Condition cc, Register reg); |
| 684 | 680 |
| 685 // Label operations & relative jumps (PPUM Appendix D) | 681 // Label operations & relative jumps (PPUM Appendix D) |
| 686 // | 682 // |
| 687 // Takes a branch opcode (cc) and a label (L) and generates | 683 // Takes a branch opcode (cc) and a label (L) and generates |
| 688 // either a backward branch or a forward branch and links it | 684 // either a backward branch or a forward branch and links it |
| 689 // to the label fixup chain. Usage: | 685 // to the label fixup chain. Usage: |
| 690 // | 686 // |
| 691 // Label L; // unbound label | 687 // Label L; // unbound label |
| 692 // j(cc, &L); // forward branch to unbound label | 688 // j(cc, &L); // forward branch to unbound label |
| 693 // bind(&L); // bind label to the current pc | 689 // bind(&L); // bind label to the current pc |
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| 711 | 707 |
| 712 // Jumps | 708 // Jumps |
| 713 // Jump short or near relative. | 709 // Jump short or near relative. |
| 714 void jmp(Label* L); // unconditional jump to L | 710 void jmp(Label* L); // unconditional jump to L |
| 715 | 711 |
| 716 // Jump near absolute indirect (r64) | 712 // Jump near absolute indirect (r64) |
| 717 void jmp(Register adr); | 713 void jmp(Register adr); |
| 718 | 714 |
| 719 // Conditional jumps | 715 // Conditional jumps |
| 720 void j(Condition cc, Label* L); | 716 void j(Condition cc, Label* L); |
| 721 void j(Condition cc, byte* entry, RelocInfo::Mode rmode); | |
| 722 void j(Condition cc, Handle<Code> code); | |
| 723 | 717 |
| 724 // Floating-point operations | 718 // Floating-point operations |
| 725 void fld(int i); | 719 void fld(int i); |
| 726 | 720 |
| 727 void fld1(); | 721 void fld1(); |
| 728 void fldz(); | 722 void fldz(); |
| 729 | 723 |
| 730 void fld_s(const Operand& adr); | 724 void fld_s(const Operand& adr); |
| 731 void fld_d(const Operand& adr); | 725 void fld_d(const Operand& adr); |
| 732 | 726 |
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| 768 void ftst(); | 762 void ftst(); |
| 769 void fucomp(int i); | 763 void fucomp(int i); |
| 770 void fucompp(); | 764 void fucompp(); |
| 771 void fcompp(); | 765 void fcompp(); |
| 772 void fnstsw_ax(); | 766 void fnstsw_ax(); |
| 773 void fwait(); | 767 void fwait(); |
| 774 void fnclex(); | 768 void fnclex(); |
| 775 | 769 |
| 776 void frndint(); | 770 void frndint(); |
| 777 | 771 |
| 778 void sahf(); | |
| 779 void setcc(Condition cc, Register reg); | |
| 780 | |
| 781 void cpuid(); | |
| 782 | |
| 783 // SSE2 instructions | 772 // SSE2 instructions |
| 784 void cvttss2si(Register dst, const Operand& src); | 773 void cvttss2si(Register dst, const Operand& src); |
| 785 void cvttsd2si(Register dst, const Operand& src); | 774 void cvttsd2si(Register dst, const Operand& src); |
| 786 | 775 |
| 787 void cvtsi2sd(XMMRegister dst, const Operand& src); | 776 void cvtsi2sd(XMMRegister dst, const Operand& src); |
| 788 | 777 |
| 789 void addsd(XMMRegister dst, XMMRegister src); | 778 void addsd(XMMRegister dst, XMMRegister src); |
| 790 void subsd(XMMRegister dst, XMMRegister src); | 779 void subsd(XMMRegister dst, XMMRegister src); |
| 791 void mulsd(XMMRegister dst, XMMRegister src); | 780 void mulsd(XMMRegister dst, XMMRegister src); |
| 792 void divsd(XMMRegister dst, XMMRegister src); | 781 void divsd(XMMRegister dst, XMMRegister src); |
| 793 | 782 |
| 794 // Use either movsd or movlpd. | 783 // Use either movsd or movlpd. |
| 795 void movdbl(XMMRegister dst, const Operand& src); | 784 // void movdbl(XMMRegister dst, const Operand& src); |
| 796 void movdbl(const Operand& dst, XMMRegister src); | 785 // void movdbl(const Operand& dst, XMMRegister src); |
| 797 | 786 |
| 798 // Debugging | 787 // Debugging |
| 799 void Print(); | 788 void Print(); |
| 800 | 789 |
| 801 // Check the code size generated from label to here. | 790 // Check the code size generated from label to here. |
| 802 int SizeOfCodeGeneratedSince(Label* l) { return pc_offset() - l->pos(); } | 791 int SizeOfCodeGeneratedSince(Label* l) { return pc_offset() - l->pos(); } |
| 803 | 792 |
| 804 // Mark address of the ExitJSFrame code. | 793 // Mark address of the ExitJSFrame code. |
| 805 void RecordJSReturn(); | 794 void RecordJSReturn(); |
| 806 | 795 |
| 807 // Record a comment relocation entry that can be used by a disassembler. | 796 // Record a comment relocation entry that can be used by a disassembler. |
| 808 // Use --debug_code to enable. | 797 // Use --debug_code to enable. |
| 809 void RecordComment(const char* msg); | 798 void RecordComment(const char* msg); |
| 810 | 799 |
| 811 void RecordPosition(int pos); | 800 void RecordPosition(int pos); |
| 812 void RecordStatementPosition(int pos); | 801 void RecordStatementPosition(int pos); |
| 813 void WriteRecordedPositions(); | 802 void WriteRecordedPositions(); |
| 814 | 803 |
| 815 // Writes a doubleword of data in the code stream. | 804 // Writes a doubleword of data in the code stream. |
| 816 // Used for inline tables, e.g., jump-tables. | 805 // Used for inline tables, e.g., jump-tables. |
| 817 void dd(uint32_t data); | 806 // void dd(uint32_t data); |
| 818 | 807 |
| 819 // Writes a quadword of data in the code stream. | 808 // Writes a quadword of data in the code stream. |
| 820 // Used for inline tables, e.g., jump-tables. | 809 // Used for inline tables, e.g., jump-tables. |
| 821 void dd(uint64_t data, RelocInfo::Mode reloc_info); | 810 // void dd(uint64_t data, RelocInfo::Mode reloc_info); |
| 822 | 811 |
| 823 // Writes the absolute address of a bound label at the given position in | 812 // Writes the absolute address of a bound label at the given position in |
| 824 // the generated code. That positions should have the relocation mode | 813 // the generated code. That positions should have the relocation mode |
| 825 // internal_reference! | 814 // internal_reference! |
| 826 void WriteInternalReference(int position, const Label& bound_label); | 815 void WriteInternalReference(int position, const Label& bound_label); |
| 827 | 816 |
| 828 int pc_offset() const { return pc_ - buffer_; } | 817 int pc_offset() const { return pc_ - buffer_; } |
| 829 int current_statement_position() const { return current_statement_position_; } | 818 int current_statement_position() const { return current_statement_position_; } |
| 830 int current_position() const { return current_position_; } | 819 int current_position() const { return current_position_; } |
| 831 | 820 |
| 832 // Check if there is less than kGap bytes available in the buffer. | 821 // Check if there is less than kGap bytes available in the buffer. |
| 833 // If this is the case, we need to grow the buffer before emitting | 822 // If this is the case, we need to grow the buffer before emitting |
| 834 // an instruction or relocation information. | 823 // an instruction or relocation information. |
| 835 inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; } | 824 inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; } |
| 836 | 825 |
| 837 // Get the number of bytes available in the buffer. | 826 // Get the number of bytes available in the buffer. |
| 838 inline int available_space() const { return reloc_info_writer.pos() - pc_; } | 827 inline int available_space() const { return reloc_info_writer.pos() - pc_; } |
| 839 | 828 |
| 840 // Avoid overflows for displacements etc. | 829 // Avoid overflows for displacements etc. |
| 841 static const int kMaximalBufferSize = 512*MB; | 830 static const int kMaximalBufferSize = 512*MB; |
| 842 static const int kMinimalBufferSize = 4*KB; | 831 static const int kMinimalBufferSize = 4*KB; |
| 843 | 832 |
| 844 protected: | 833 protected: |
| 845 void movsd(XMMRegister dst, const Operand& src); | 834 // void movsd(XMMRegister dst, const Operand& src); |
| 846 void movsd(const Operand& dst, XMMRegister src); | 835 // void movsd(const Operand& dst, XMMRegister src); |
| 847 | 836 |
| 848 void emit_sse_operand(XMMRegister reg, const Operand& adr); | 837 // void emit_sse_operand(XMMRegister reg, const Operand& adr); |
| 849 void emit_sse_operand(XMMRegister dst, XMMRegister src); | 838 // void emit_sse_operand(XMMRegister dst, XMMRegister src); |
| 850 | 839 |
| 851 | 840 |
| 852 private: | 841 private: |
| 853 byte* addr_at(int pos) { return buffer_ + pos; } | 842 byte* addr_at(int pos) { return buffer_ + pos; } |
| 854 byte byte_at(int pos) { return buffer_[pos]; } | 843 byte byte_at(int pos) { return buffer_[pos]; } |
| 855 uint32_t long_at(int pos) { | 844 uint32_t long_at(int pos) { |
| 856 return *reinterpret_cast<uint32_t*>(addr_at(pos)); | 845 return *reinterpret_cast<uint32_t*>(addr_at(pos)); |
| 857 } | 846 } |
| 858 void long_at_put(int pos, uint32_t x) { | 847 void long_at_put(int pos, uint32_t x) { |
| 859 *reinterpret_cast<uint32_t*>(addr_at(pos)) = x; | 848 *reinterpret_cast<uint32_t*>(addr_at(pos)) = x; |
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| 963 inline void emit_code_relative_offset(Label* label); | 952 inline void emit_code_relative_offset(Label* label); |
| 964 | 953 |
| 965 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, | 954 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, |
| 966 // AND, OR, XOR, or CMP. The encodings of these operations are all | 955 // AND, OR, XOR, or CMP. The encodings of these operations are all |
| 967 // similar, differing just in the opcode or in the reg field of the | 956 // similar, differing just in the opcode or in the reg field of the |
| 968 // ModR/M byte. | 957 // ModR/M byte. |
| 969 void arithmetic_op(byte opcode, Register dst, Register src); | 958 void arithmetic_op(byte opcode, Register dst, Register src); |
| 970 void arithmetic_op(byte opcode, Register reg, const Operand& op); | 959 void arithmetic_op(byte opcode, Register reg, const Operand& op); |
| 971 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); | 960 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); |
| 972 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); | 961 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); |
| 962 void immediate_arithmetic_op_32(byte subcode, |
| 963 const Operand& dst, |
| 964 Immediate src); |
| 973 // Emit machine code for a shift operation. | 965 // Emit machine code for a shift operation. |
| 974 void shift(Register dst, Immediate shift_amount, int subcode); | 966 void shift(Register dst, Immediate shift_amount, int subcode); |
| 975 // Shift dst by cl % 64 bits. | 967 // Shift dst by cl % 64 bits. |
| 976 void shift(Register dst, int subcode); | 968 void shift(Register dst, int subcode); |
| 977 | 969 |
| 978 void emit_farith(int b1, int b2, int i); | 970 // void emit_farith(int b1, int b2, int i); |
| 979 | 971 |
| 980 // labels | 972 // labels |
| 981 void print(Label* L); | 973 // void print(Label* L); |
| 982 void bind_to(Label* L, int pos); | 974 void bind_to(Label* L, int pos); |
| 983 void link_to(Label* L, Label* appendix); | 975 void link_to(Label* L, Label* appendix); |
| 984 | 976 |
| 985 // record reloc info for current pc_ | 977 // record reloc info for current pc_ |
| 986 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); | 978 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); |
| 987 | 979 |
| 988 friend class CodePatcher; | 980 friend class CodePatcher; |
| 989 friend class EnsureSpace; | 981 friend class EnsureSpace; |
| 990 | 982 |
| 991 // Code buffer: | 983 // Code buffer: |
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| 1035 private: | 1027 private: |
| 1036 Assembler* assembler_; | 1028 Assembler* assembler_; |
| 1037 #ifdef DEBUG | 1029 #ifdef DEBUG |
| 1038 int space_before_; | 1030 int space_before_; |
| 1039 #endif | 1031 #endif |
| 1040 }; | 1032 }; |
| 1041 | 1033 |
| 1042 } } // namespace v8::internal | 1034 } } // namespace v8::internal |
| 1043 | 1035 |
| 1044 #endif // V8_X64_ASSEMBLER_X64_H_ | 1036 #endif // V8_X64_ASSEMBLER_X64_H_ |
| OLD | NEW |