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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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551 immediate_arithmetic_op(0x1, dst, src); | 551 immediate_arithmetic_op(0x1, dst, src); |
552 } | 552 } |
553 | 553 |
554 void or_(const Operand& dst, Immediate src) { | 554 void or_(const Operand& dst, Immediate src) { |
555 immediate_arithmetic_op(0x1, dst, src); | 555 immediate_arithmetic_op(0x1, dst, src); |
556 } | 556 } |
557 | 557 |
558 | 558 |
559 void rcl(Register dst, uint8_t imm8); | 559 void rcl(Register dst, uint8_t imm8); |
560 | 560 |
561 void sar(Register dst, uint8_t imm8); | |
562 void sar(Register dst); | |
563 | |
564 void sbb(Register dst, const Operand& src); | 561 void sbb(Register dst, const Operand& src); |
565 | 562 |
566 void shld(Register dst, const Operand& src); | 563 void shld(Register dst, const Operand& src); |
567 | 564 |
568 void shl(Register dst, uint8_t imm8); | |
569 void shl(Register dst); | |
570 | |
571 void shrd(Register dst, const Operand& src); | 565 void shrd(Register dst, const Operand& src); |
572 | 566 |
573 void shr(Register dst, uint8_t imm8); | 567 // Shifts dst right, duplicating sign bit, by shift_amount bits. |
574 void shr(Register dst); | 568 // Shifting by 1 is handled efficiently. |
575 void shr_cl(Register dst); | 569 void sar(Register dst, Immediate shift_amount) { |
| 570 shift(dst, shift_amount, 0x7); |
| 571 } |
| 572 |
| 573 // Shifts dst right, duplicating sign bit, by cl % 64 bits. |
| 574 void sar(Register dst) { |
| 575 shift(dst, 0x7); |
| 576 } |
| 577 |
| 578 void shl(Register dst, Immediate shift_amount) { |
| 579 shift(dst, shift_amount, 0x4); |
| 580 } |
| 581 |
| 582 void shl(Register dst) { |
| 583 shift(dst, 0x4); |
| 584 } |
| 585 |
| 586 void shr(Register dst, Immediate shift_amount) { |
| 587 shift(dst, shift_amount, 0x5); |
| 588 } |
| 589 |
| 590 void shr(Register dst) { |
| 591 shift(dst, 0x5); |
| 592 } |
576 | 593 |
577 void sub(Register dst, Register src) { | 594 void sub(Register dst, Register src) { |
578 arithmetic_op(0x2B, dst, src); | 595 arithmetic_op(0x2B, dst, src); |
579 } | 596 } |
580 | 597 |
581 void sub(Register dst, const Operand& src) { | 598 void sub(Register dst, const Operand& src) { |
582 arithmetic_op(0x2B, dst, src); | 599 arithmetic_op(0x2B, dst, src); |
583 } | 600 } |
584 | 601 |
585 void sub(const Operand& dst, Register src) { | 602 void sub(const Operand& dst, Register src) { |
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877 inline void emit_code_relative_offset(Label* label); | 894 inline void emit_code_relative_offset(Label* label); |
878 | 895 |
879 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, | 896 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, |
880 // AND, OR, XOR, or CMP. The encodings of these operations are all | 897 // AND, OR, XOR, or CMP. The encodings of these operations are all |
881 // similar, differing just in the opcode or in the reg field of the | 898 // similar, differing just in the opcode or in the reg field of the |
882 // Mod/RM byte. | 899 // Mod/RM byte. |
883 void arithmetic_op(byte opcode, Register dst, Register src); | 900 void arithmetic_op(byte opcode, Register dst, Register src); |
884 void arithmetic_op(byte opcode, Register reg, const Operand& op); | 901 void arithmetic_op(byte opcode, Register reg, const Operand& op); |
885 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); | 902 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); |
886 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); | 903 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); |
| 904 // Emit machine code for a shift operation. |
| 905 void shift(Register dst, Immediate shift_amount, int subcode); |
| 906 // Shift dst by cl % 64 bits. |
| 907 void shift(Register dst, int subcode); |
887 | 908 |
888 void emit_farith(int b1, int b2, int i); | 909 void emit_farith(int b1, int b2, int i); |
889 | 910 |
890 // labels | 911 // labels |
891 void print(Label* L); | 912 void print(Label* L); |
892 void bind_to(Label* L, int pos); | 913 void bind_to(Label* L, int pos); |
893 void link_to(Label* L, Label* appendix); | 914 void link_to(Label* L, Label* appendix); |
894 | 915 |
895 // record reloc info for current pc_ | 916 // record reloc info for current pc_ |
896 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); | 917 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); |
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945 private: | 966 private: |
946 Assembler* assembler_; | 967 Assembler* assembler_; |
947 #ifdef DEBUG | 968 #ifdef DEBUG |
948 int space_before_; | 969 int space_before_; |
949 #endif | 970 #endif |
950 }; | 971 }; |
951 | 972 |
952 } } // namespace v8::internal | 973 } } // namespace v8::internal |
953 | 974 |
954 #endif // V8_X64_ASSEMBLER_X64_H_ | 975 #endif // V8_X64_ASSEMBLER_X64_H_ |
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