X64: Added jmp and call and nop(n) to X64 assembler.

src/x64/assembler-x64-inl.h

 // Copyright 2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 52 matching lines @@
 
 
 // The high bit of reg is used for REX.R, the high bit of op's base
 // register is used for REX.B, and the high bit of op's index register
 // is used for REX.X.  REX.W is set.
 void Assembler::emit_rex_64(Register reg, const Operand& op) {
   emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
 }
 
 
+// The high bit of the register is used for REX.B.
+// REX.W is set and REX.R and REX.X are clear.
+void Assembler::emit_rex_64(Register rm_reg) {
+  ASSERT_EQ(rm_reg.code() & 0x0f, rm_reg.code());
+  emit(0x48 | (rm_reg.code() >> 3));

[William Hesse, 2009/05/29 13:08:00]

There was never a good reason for putting these in -inl-h, so these and the two
above should be in the .h file.
But it is ok to leave them here too.

+}
+
+
+// The high bit of op's base register is used for REX.B, and the high
+// bit of op's index register is used for REX.X.  REX.W is set and REX.R clear.
+void Assembler::emit_rex_64(const Operand& op) {
+  emit(0x48 | op.rex_);
+}
+
+
 // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B.
-// REX.W is set.  REX.X is cleared.
+// REX.W and REX.X are clear.
 void Assembler::emit_rex_32(Register reg, Register rm_reg) {
   emit(0x40 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
 }
 
 
 // The high bit of reg is used for REX.R, the high bit of op's base
 // register is used for REX.B, and the high bit of op's index register
 // is used for REX.X.  REX.W is cleared.
 void Assembler::emit_rex_32(Register reg, const Operand& op) {
   emit(0x40 | (reg.code() & 0x8) >> 1 | op.rex_);
@@ skipping 130 matching lines @@
   return reinterpret_cast<Object**>(pc_ + 1);
 }
 
 // -----------------------------------------------------------------------------
 // Implementation of Operand
 
 Operand::Operand(Register base, int32_t disp) {
   len_ = 1;
   if (base.is(rsp) || base.is(r12)) {
     // SIB byte is needed to encode (rsp + offset) or (r12 + offset).
-    set_sib(times_1, rsp, base);
+    set_sib(kTimes1, rsp, base);
   }
 
   if (disp == 0 && !base.is(rbp) && !base.is(r13)) {
     set_modrm(0, rsp);
   } else if (is_int8(disp)) {
     set_modrm(1, base);
     set_disp8(disp);
   } else {
     set_modrm(2, base);
     set_disp32(disp);
   }
 }
 
 void Operand::set_modrm(int mod, Register rm) {
   ASSERT((mod & -4) == 0);
   buf_[0] = mod << 6 | (rm.code() & 0x7);
   // Set REX.B to the high bit of rm.code().
   rex_ |= (rm.code() >> 3);
 }
 
 
 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
   ASSERT(len_ == 1);
-  ASSERT((scale & -4) == 0);
+  ASSERT(is_uint2(scale));
   // Use SIB with no index register only for base rsp or r12.
   ASSERT(!index.is(rsp) || base.is(rsp) || base.is(r12));
   buf_[1] = scale << 6 | (index.code() & 0x7) << 3 | (base.code() & 0x7);
   rex_ |= (index.code() >> 3) << 1 | base.code() >> 3;
   len_ = 2;
 }
 
 void Operand::set_disp8(int disp) {
   ASSERT(is_int8(disp));
   ASSERT(len_ == 1 || len_ == 2);
   int8_t* p = reinterpret_cast<int8_t*>(&buf_[len_]);
   *p = disp;
   len_ += sizeof(int8_t);
 }
 
 void Operand::set_disp32(int disp) {
   ASSERT(len_ == 1 || len_ == 2);
   int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
   *p = disp;
   len_ += sizeof(int32_t);
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_X64_ASSEMBLER_X64_INL_H_