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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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443 | 443 |
444 // Arithmetics | 444 // Arithmetics |
445 void add(Register dst, Register src) { | 445 void add(Register dst, Register src) { |
446 arithmetic_op(0x03, dst, src); | 446 arithmetic_op(0x03, dst, src); |
447 } | 447 } |
448 | 448 |
449 void add(Register dst, const Operand& src) { | 449 void add(Register dst, const Operand& src) { |
450 arithmetic_op(0x03, dst, src); | 450 arithmetic_op(0x03, dst, src); |
451 } | 451 } |
452 | 452 |
| 453 |
453 void add(const Operand& dst, Register src) { | 454 void add(const Operand& dst, Register src) { |
454 arithmetic_op(0x01, src, dst); | 455 arithmetic_op(0x01, src, dst); |
455 } | 456 } |
456 | 457 |
457 void add(Register dst, Immediate src) { | 458 void add(Register dst, Immediate src) { |
458 immediate_arithmetic_op(0x0, dst, src); | 459 immediate_arithmetic_op(0x0, dst, src); |
459 } | 460 } |
460 | 461 |
461 void add(const Operand& dst, Immediate src) { | 462 void add(const Operand& dst, Immediate src) { |
462 immediate_arithmetic_op(0x0, dst, src); | 463 immediate_arithmetic_op(0x0, dst, src); |
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475 } | 476 } |
476 | 477 |
477 void cmp(Register dst, Immediate src) { | 478 void cmp(Register dst, Immediate src) { |
478 immediate_arithmetic_op(0x7, dst, src); | 479 immediate_arithmetic_op(0x7, dst, src); |
479 } | 480 } |
480 | 481 |
481 void cmp(const Operand& dst, Immediate src) { | 482 void cmp(const Operand& dst, Immediate src) { |
482 immediate_arithmetic_op(0x7, dst, src); | 483 immediate_arithmetic_op(0x7, dst, src); |
483 } | 484 } |
484 | 485 |
| 486 void and_(Register dst, Register src) { |
| 487 arithmetic_op(0x23, dst, src); |
| 488 } |
485 | 489 |
486 void and_(Register dst, int32_t imm32); | 490 void and_(Register dst, const Operand& src) { |
487 void and_(Register dst, const Operand& src); | 491 arithmetic_op(0x23, dst, src); |
488 void and_(const Operand& src, Register dst); | 492 } |
489 void and_(const Operand& dst, const Immediate& x); | 493 |
| 494 void and_(const Operand& dst, Register src) { |
| 495 arithmetic_op(0x21, src, dst); |
| 496 } |
| 497 |
| 498 void and_(Register dst, Immediate src) { |
| 499 immediate_arithmetic_op(0x4, dst, src); |
| 500 } |
| 501 |
| 502 void and_(const Operand& dst, Immediate src) { |
| 503 immediate_arithmetic_op(0x4, dst, src); |
| 504 } |
490 | 505 |
491 void cmpb(const Operand& op, int8_t imm8); | 506 void cmpb(const Operand& op, int8_t imm8); |
492 void cmpb_al(const Operand& op); | 507 void cmpb_al(const Operand& op); |
493 void cmpw_ax(const Operand& op); | 508 void cmpw_ax(const Operand& op); |
494 void cmpw(const Operand& op, Immediate imm16); | 509 void cmpw(const Operand& op, Immediate imm16); |
495 | 510 |
496 void dec_b(Register dst); | 511 void dec_b(Register dst); |
497 | 512 |
498 void dec(Register dst); | 513 void dec(Register dst); |
499 void dec(const Operand& dst); | 514 void dec(const Operand& dst); |
500 | 515 |
501 void cdq(); | 516 void cdq(); |
502 | 517 |
503 void idiv(Register src); | 518 void idiv(Register src); |
504 | 519 |
505 void imul(Register dst, const Operand& src); | 520 void imul(Register dst, const Operand& src); |
506 void imul(Register dst, Register src, int32_t imm32); | 521 void imul(Register dst, Register src, int32_t imm32); |
507 | 522 |
508 void inc(Register dst); | 523 void inc(Register dst); |
509 void inc(const Operand& dst); | 524 void inc(const Operand& dst); |
510 | 525 |
511 void lea(Register dst, const Operand& src); | 526 void lea(Register dst, const Operand& src); |
512 | 527 |
513 void mul(Register src); | 528 void mul(Register src); |
514 | 529 |
515 void neg(Register dst); | 530 void neg(Register dst); |
516 | 531 |
517 void not_(Register dst); | 532 void not_(Register dst); |
518 | 533 |
519 void or_(Register dst, int32_t imm32); | 534 void or_(Register dst, Register src) { |
520 void or_(Register dst, const Operand& src); | 535 arithmetic_op(0x0B, dst, src); |
521 void or_(const Operand& dst, Register src); | 536 } |
522 void or_(const Operand& dst, const Immediate& x); | 537 |
| 538 void or_(Register dst, const Operand& src) { |
| 539 arithmetic_op(0x0B, dst, src); |
| 540 } |
| 541 |
| 542 void or_(const Operand& dst, Register src) { |
| 543 arithmetic_op(0x09, src, dst); |
| 544 } |
| 545 |
| 546 void or_(Register dst, Immediate src) { |
| 547 immediate_arithmetic_op(0x1, dst, src); |
| 548 } |
| 549 |
| 550 void or_(const Operand& dst, Immediate src) { |
| 551 immediate_arithmetic_op(0x1, dst, src); |
| 552 } |
| 553 |
523 | 554 |
524 void rcl(Register dst, uint8_t imm8); | 555 void rcl(Register dst, uint8_t imm8); |
525 | 556 |
526 void sar(Register dst, uint8_t imm8); | 557 void sar(Register dst, uint8_t imm8); |
527 void sar(Register dst); | 558 void sar(Register dst); |
528 | 559 |
529 void sbb(Register dst, const Operand& src); | 560 void sbb(Register dst, const Operand& src); |
530 | 561 |
531 void shld(Register dst, const Operand& src); | 562 void shld(Register dst, const Operand& src); |
532 | 563 |
533 void shl(Register dst, uint8_t imm8); | 564 void shl(Register dst, uint8_t imm8); |
534 void shl(Register dst); | 565 void shl(Register dst); |
535 | 566 |
536 void shrd(Register dst, const Operand& src); | 567 void shrd(Register dst, const Operand& src); |
537 | 568 |
538 void shr(Register dst, uint8_t imm8); | 569 void shr(Register dst, uint8_t imm8); |
539 void shr(Register dst); | 570 void shr(Register dst); |
540 void shr_cl(Register dst); | 571 void shr_cl(Register dst); |
541 | 572 |
542 void sub(const Operand& dst, const Immediate& x); | 573 void sub(Register dst, Register src) { |
543 void sub(Register dst, const Operand& src); | 574 arithmetic_op(0x2B, dst, src); |
544 void sub(const Operand& dst, Register src); | 575 } |
| 576 |
| 577 void sub(Register dst, const Operand& src) { |
| 578 arithmetic_op(0x2B, dst, src); |
| 579 } |
| 580 |
| 581 void sub(const Operand& dst, Register src) { |
| 582 arithmetic_op(0x29, src, dst); |
| 583 } |
| 584 |
| 585 void sub(Register dst, Immediate src) { |
| 586 immediate_arithmetic_op(0x5, dst, src); |
| 587 } |
| 588 |
| 589 void sub(const Operand& dst, Immediate src) { |
| 590 immediate_arithmetic_op(0x5, dst, src); |
| 591 } |
| 592 |
545 | 593 |
546 void test(Register reg, const Immediate& imm); | 594 void test(Register reg, const Immediate& imm); |
547 void test(Register reg, const Operand& op); | 595 void test(Register reg, const Operand& op); |
548 void test(const Operand& op, const Immediate& imm); | 596 void test(const Operand& op, const Immediate& imm); |
549 | 597 |
550 void xor_(Register dst, int32_t imm32); | 598 void xor_(Register dst, Register src) { |
551 void xor_(Register dst, const Operand& src); | 599 arithmetic_op(0x33, dst, src); |
552 void xor_(const Operand& src, Register dst); | 600 } |
553 void xor_(const Operand& dst, const Immediate& x); | 601 |
| 602 void xor_(Register dst, const Operand& src) { |
| 603 arithmetic_op(0x33, dst, src); |
| 604 } |
| 605 |
| 606 void xor_(const Operand& dst, Register src) { |
| 607 arithmetic_op(0x31, src, dst); |
| 608 } |
| 609 |
| 610 void xor_(Register dst, Immediate src) { |
| 611 immediate_arithmetic_op(0x6, dst, src); |
| 612 } |
| 613 |
| 614 void xor_(const Operand& dst, Immediate src) { |
| 615 immediate_arithmetic_op(0x6, dst, src); |
| 616 } |
| 617 |
554 | 618 |
555 // Bit operations. | 619 // Bit operations. |
556 void bt(const Operand& dst, Register src); | 620 void bt(const Operand& dst, Register src); |
557 void bts(const Operand& dst, Register src); | 621 void bts(const Operand& dst, Register src); |
558 | 622 |
559 // Miscellaneous | 623 // Miscellaneous |
560 void hlt(); | 624 void hlt(); |
561 void int3(); | 625 void int3(); |
562 void nop(); | 626 void nop(); |
563 void rdtsc(); | 627 void rdtsc(); |
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726 byte byte_at(int pos) { return buffer_[pos]; } | 790 byte byte_at(int pos) { return buffer_[pos]; } |
727 uint32_t long_at(int pos) { | 791 uint32_t long_at(int pos) { |
728 return *reinterpret_cast<uint32_t*>(addr_at(pos)); | 792 return *reinterpret_cast<uint32_t*>(addr_at(pos)); |
729 } | 793 } |
730 void long_at_put(int pos, uint32_t x) { | 794 void long_at_put(int pos, uint32_t x) { |
731 *reinterpret_cast<uint32_t*>(addr_at(pos)) = x; | 795 *reinterpret_cast<uint32_t*>(addr_at(pos)) = x; |
732 } | 796 } |
733 | 797 |
734 // code emission | 798 // code emission |
735 void GrowBuffer(); | 799 void GrowBuffer(); |
| 800 |
| 801 void emit(byte x) { *pc_++ = x; } |
736 inline void emitl(uint32_t x); | 802 inline void emitl(uint32_t x); |
737 inline void emit(Handle<Object> handle); | 803 inline void emit(Handle<Object> handle); |
738 inline void emitq(uint64_t x, RelocInfo::Mode rmode); | 804 inline void emitq(uint64_t x, RelocInfo::Mode rmode); |
739 void emit(Immediate x) { emitl(x.value_); } | 805 void emit(Immediate x) { emitl(x.value_); } |
740 | 806 |
741 // Emits a REX prefix that encodes a 64-bit operand size and | 807 // Emits a REX prefix that encodes a 64-bit operand size and |
742 // the top bit of both register codes. | 808 // the top bit of both register codes. |
743 // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B. | 809 // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B. |
744 // REX.W is set. | 810 // REX.W is set. |
745 inline void emit_rex_64(Register reg, Register rm_reg); | 811 inline void emit_rex_64(Register reg, Register rm_reg); |
746 | 812 |
747 // Emits a REX prefix that encodes a 64-bit operand size and | 813 // Emits a REX prefix that encodes a 64-bit operand size and |
748 // the top bit of the destination, index, and base register codes. | 814 // the top bit of the destination, index, and base register codes. |
749 // The high bit of reg is used for REX.R, the high bit of op's base | 815 // The high bit of reg is used for REX.R, the high bit of op's base |
750 // register is used for REX.B, and the high bit of op's index register | 816 // register is used for REX.B, and the high bit of op's index register |
751 // is used for REX.X. REX.W is set. | 817 // is used for REX.X. REX.W is set. |
752 inline void emit_rex_64(Register reg, const Operand& op); | 818 inline void emit_rex_64(Register reg, const Operand& op); |
753 | 819 |
| 820 // Emit the Mod/RM byte, and optionally the SIB byte and |
| 821 // 1- or 4-byte offset for a memory operand. Also encodes |
| 822 // the second operand of the operation, a register, into the Mod/RM byte. |
| 823 void emit_operand(Register reg, const Operand& adr); |
| 824 |
754 // Emit the code-object-relative offset of the label's position | 825 // Emit the code-object-relative offset of the label's position |
755 inline void emit_code_relative_offset(Label* label); | 826 inline void emit_code_relative_offset(Label* label); |
756 | 827 |
757 // instruction generation | 828 // Emit machine code for one of the operations ADD, ADC, SUB, SBC, |
758 void emit_arith_b(int op1, int op2, Register dst, int imm8); | 829 // AND, OR, XOR, or CMP. The encodings of these operations are all |
759 | 830 // similar, differing just in the opcode or in the reg field of the |
760 // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81) | 831 // Mod/RM byte. |
761 // with a given destination expression and an immediate operand. It attempts | |
762 // to use the shortest encoding possible. | |
763 // sel specifies the /n in the modrm byte (see the Intel PRM). | |
764 void arithmetic_op(byte opcode, Register dst, Register src); | 832 void arithmetic_op(byte opcode, Register dst, Register src); |
765 void arithmetic_op(byte opcode, Register reg, const Operand& op); | 833 void arithmetic_op(byte opcode, Register reg, const Operand& op); |
766 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); | 834 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src); |
767 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); | 835 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src); |
768 | 836 |
769 void emit_arith(int sel, Operand dst, const Immediate& x); | |
770 | |
771 void emit_operand(Register reg, const Operand& adr); | |
772 | |
773 void emit_farith(int b1, int b2, int i); | 837 void emit_farith(int b1, int b2, int i); |
774 | 838 |
775 // labels | 839 // labels |
776 void print(Label* L); | 840 void print(Label* L); |
777 void bind_to(Label* L, int pos); | 841 void bind_to(Label* L, int pos); |
778 void link_to(Label* L, Label* appendix); | 842 void link_to(Label* L, Label* appendix); |
779 | 843 |
780 // record reloc info for current pc_ | 844 // record reloc info for current pc_ |
781 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0) { | 845 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0) { |
782 UNIMPLEMENTED(); | 846 UNIMPLEMENTED(); |
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832 private: | 896 private: |
833 Assembler* assembler_; | 897 Assembler* assembler_; |
834 #ifdef DEBUG | 898 #ifdef DEBUG |
835 int space_before_; | 899 int space_before_; |
836 #endif | 900 #endif |
837 }; | 901 }; |
838 | 902 |
839 } } // namespace v8::internal | 903 } } // namespace v8::internal |
840 | 904 |
841 #endif // V8_X64_ASSEMBLER_X64_H_ | 905 #endif // V8_X64_ASSEMBLER_X64_H_ |
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