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1 // Copyright 2008 the V8 project authors. All rights reserved. | 1 // Copyright 2008 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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59 | 59 |
60 // The simulator has its own stack. Thus it has a different stack limit from | 60 // The simulator has its own stack. Thus it has a different stack limit from |
61 // the C-based native code. | 61 // the C-based native code. |
62 #define GENERATED_CODE_STACK_LIMIT(limit) \ | 62 #define GENERATED_CODE_STACK_LIMIT(limit) \ |
63 (assembler::arm::Simulator::current()->StackLimit()) | 63 (assembler::arm::Simulator::current()->StackLimit()) |
64 | 64 |
65 | 65 |
66 #include "constants-arm.h" | 66 #include "constants-arm.h" |
67 | 67 |
68 | 68 |
69 namespace assembler { namespace arm { | 69 namespace assembler { |
| 70 namespace arm { |
70 | 71 |
71 class Simulator { | 72 class Simulator { |
72 public: | 73 public: |
73 friend class Debugger; | 74 friend class Debugger; |
74 | 75 |
75 enum Register { | 76 enum Register { |
76 no_reg = -1, | 77 no_reg = -1, |
77 r0 = 0, r1, r2, r3, r4, r5, r6, r7, | 78 r0 = 0, r1, r2, r3, r4, r5, r6, r7, |
78 r8, r9, r10, r11, r12, r13, r14, r15, | 79 r8, r9, r10, r11, r12, r13, r14, r15, |
79 num_registers, | 80 num_registers, |
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195 // registered breakpoints | 196 // registered breakpoints |
196 Instr* break_pc_; | 197 Instr* break_pc_; |
197 instr_t break_instr_; | 198 instr_t break_instr_; |
198 }; | 199 }; |
199 | 200 |
200 } } // namespace assembler::arm | 201 } } // namespace assembler::arm |
201 | 202 |
202 #endif // defined(__arm__) | 203 #endif // defined(__arm__) |
203 | 204 |
204 #endif // V8_ARM_SIMULATOR_ARM_H_ | 205 #endif // V8_ARM_SIMULATOR_ARM_H_ |
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