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Issue 115568: Add the REX prefix to 64-bit assembly operands. Move some inline functions. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 11 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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270 } 270 }
271 271
272 272
273 void Operand::set_modrm(int mod, Register rm) { 273 void Operand::set_modrm(int mod, Register rm) {
274 ASSERT((mod & -4) == 0); 274 ASSERT((mod & -4) == 0);
275 buf_[0] = mod << 6 | rm.code(); 275 buf_[0] = mod << 6 | rm.code();
276 len_ = 1; 276 len_ = 1;
277 } 277 }
278 278
279 279
280 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
281 ASSERT(len_ == 1);
282 ASSERT((scale & -4) == 0);
283 // Use SIB with no index register only for base esp.
284 ASSERT(!index.is(esp) || base.is(esp));
285 buf_[1] = scale << 6 | index.code() << 3 | base.code();
286 len_ = 2;
287 }
288
289
290 void Operand::set_disp8(int8_t disp) {
291 ASSERT(len_ == 1 || len_ == 2);
292 *reinterpret_cast<int8_t*>(&buf_[len_++]) = disp;
293 }
294
295
280 void Operand::set_dispr(int32_t disp, RelocInfo::Mode rmode) { 296 void Operand::set_dispr(int32_t disp, RelocInfo::Mode rmode) {
281 ASSERT(len_ == 1 || len_ == 2); 297 ASSERT(len_ == 1 || len_ == 2);
282 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); 298 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
283 *p = disp; 299 *p = disp;
284 len_ += sizeof(int32_t); 300 len_ += sizeof(int32_t);
285 rmode_ = rmode; 301 rmode_ = rmode;
286 } 302 }
287 303
288 Operand::Operand(Register reg) { 304 Operand::Operand(Register reg) {
289 // reg 305 // reg
290 set_modrm(3, reg); 306 set_modrm(3, reg);
291 } 307 }
292 308
293 309
294 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) { 310 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) {
295 // [disp/r] 311 // [disp/r]
296 set_modrm(0, ebp); 312 set_modrm(0, ebp);
297 set_dispr(disp, rmode); 313 set_dispr(disp, rmode);
298 } 314 }
299 315
300 } } // namespace v8::internal 316 } } // namespace v8::internal
301 317
302 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ 318 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_
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