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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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70 // doing certain constant folds, which may significantly reduce the | 70 // doing certain constant folds, which may significantly reduce the |
71 // code generated for some assembly instructions (because they boil down | 71 // code generated for some assembly instructions (because they boil down |
72 // to a few constants). If this is a problem, we could change the code | 72 // to a few constants). If this is a problem, we could change the code |
73 // such that we use an enum in optimized mode, and the struct in debug | 73 // such that we use an enum in optimized mode, and the struct in debug |
74 // mode. This way we get the compile-time error checking in debug mode | 74 // mode. This way we get the compile-time error checking in debug mode |
75 // and best performance in optimized code. | 75 // and best performance in optimized code. |
76 // | 76 // |
77 | 77 |
78 struct Register { | 78 struct Register { |
79 static Register toRegister(int code) { | 79 static Register toRegister(int code) { |
80 Register r = {code}; | 80 Register r = { code }; |
81 return r; | 81 return r; |
82 } | 82 } |
83 bool is_valid() const { return 0 <= code_ && code_ < 16; } | 83 bool is_valid() const { return 0 <= code_ && code_ < 16; } |
84 bool is(Register reg) const { return code_ == reg.code_; } | 84 bool is(Register reg) const { return code_ == reg.code_; } |
85 // The byte-register distinction of ai32 has dissapeared. | 85 // The byte-register distinction of ai32 has dissapeared. |
86 bool is_byte_register() const { return false; } | 86 bool is_byte_register() const { return false; } |
87 int code() const { | 87 int code() const { |
88 ASSERT(is_valid()); | 88 ASSERT(is_valid()); |
89 return code_; | 89 return code_; |
90 } | 90 } |
91 int bit() const { | 91 int bit() const { |
92 UNIMPLEMENTED(); | 92 return 1 << code_; |
93 return 0; | |
94 } | 93 } |
95 | 94 |
96 // (unfortunately we can't make this private in a struct) | 95 // (unfortunately we can't make this private in a struct when initializing |
| 96 // by assignment.) |
97 int code_; | 97 int code_; |
98 }; | 98 }; |
99 | 99 |
100 extern Register rax; | 100 extern Register rax; |
101 extern Register rcx; | 101 extern Register rcx; |
102 extern Register rdx; | 102 extern Register rdx; |
103 extern Register rbx; | 103 extern Register rbx; |
104 extern Register rsp; | 104 extern Register rsp; |
105 extern Register rbp; | 105 extern Register rbp; |
106 extern Register rsi; | 106 extern Register rsi; |
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243 kTimes4 = 2, | 243 kTimes4 = 2, |
244 kTimes8 = 3, | 244 kTimes8 = 3, |
245 kTimesIntSize = kTimes4, | 245 kTimesIntSize = kTimes4, |
246 kTimesPointerSize = kTimes8 | 246 kTimesPointerSize = kTimes8 |
247 }; | 247 }; |
248 | 248 |
249 | 249 |
250 class Operand BASE_EMBEDDED { | 250 class Operand BASE_EMBEDDED { |
251 public: | 251 public: |
252 // [base + disp/r] | 252 // [base + disp/r] |
253 INLINE(Operand(Register base, int32_t disp)); | 253 Operand(Register base, int32_t disp); |
254 | 254 |
255 // [base + index*scale + disp/r] | 255 // [base + index*scale + disp/r] |
256 Operand(Register base, | 256 Operand(Register base, |
257 Register index, | 257 Register index, |
258 ScaleFactor scale, | 258 ScaleFactor scale, |
259 int32_t disp); | 259 int32_t disp); |
260 | 260 |
261 // [index*scale + disp/r] | 261 // [index*scale + disp/r] |
262 Operand(Register index, | 262 Operand(Register index, |
263 ScaleFactor scale, | 263 ScaleFactor scale, |
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427 void movl(Register dst, Immediate imm32); | 427 void movl(Register dst, Immediate imm32); |
428 | 428 |
429 void movq(Register dst, int32_t imm32); | 429 void movq(Register dst, int32_t imm32); |
430 void movq(Register dst, const Operand& src); | 430 void movq(Register dst, const Operand& src); |
431 // Sign extends immediate 32-bit value to 64 bits. | 431 // Sign extends immediate 32-bit value to 64 bits. |
432 void movq(Register dst, Immediate x); | 432 void movq(Register dst, Immediate x); |
433 void movq(Register dst, Register src); | 433 void movq(Register dst, Register src); |
434 | 434 |
435 // Move 64 bit register value to 64-bit memory location. | 435 // Move 64 bit register value to 64-bit memory location. |
436 void movq(const Operand& dst, Register src); | 436 void movq(const Operand& dst, Register src); |
437 | 437 // Move sign extended immediate to memory location. |
| 438 void movq(const Operand& dst, Immediate value); |
438 // New x64 instructions to load a 64-bit immediate into a register. | 439 // New x64 instructions to load a 64-bit immediate into a register. |
439 // All 64-bit immediates must have a relocation mode. | 440 // All 64-bit immediates must have a relocation mode. |
440 void movq(Register dst, void* ptr, RelocInfo::Mode rmode); | 441 void movq(Register dst, void* ptr, RelocInfo::Mode rmode); |
441 void movq(Register dst, int64_t value, RelocInfo::Mode rmode); | 442 void movq(Register dst, int64_t value, RelocInfo::Mode rmode); |
442 void movq(Register dst, const char* s, RelocInfo::Mode rmode); | 443 void movq(Register dst, const char* s, RelocInfo::Mode rmode); |
443 // Moves the address of the external reference into the register. | 444 // Moves the address of the external reference into the register. |
444 void movq(Register dst, ExternalReference ext); | 445 void movq(Register dst, ExternalReference ext); |
445 void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode); | 446 void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode); |
446 | 447 |
447 | |
448 // New x64 instruction to load from an immediate 64-bit pointer into RAX. | 448 // New x64 instruction to load from an immediate 64-bit pointer into RAX. |
449 void load_rax(void* ptr, RelocInfo::Mode rmode); | 449 void load_rax(void* ptr, RelocInfo::Mode rmode); |
450 void load_rax(ExternalReference ext); | 450 void load_rax(ExternalReference ext); |
451 | 451 |
452 void movsx_b(Register dst, const Operand& src); | 452 void movsx_b(Register dst, const Operand& src); |
453 | 453 |
454 void movsx_w(Register dst, const Operand& src); | 454 void movsx_w(Register dst, const Operand& src); |
455 | 455 |
456 void movzx_b(Register dst, const Operand& src); | 456 void movzx_b(Register dst, const Operand& src); |
457 | 457 |
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640 void sub(const Operand& dst, Immediate src) { | 640 void sub(const Operand& dst, Immediate src) { |
641 immediate_arithmetic_op(0x5, dst, src); | 641 immediate_arithmetic_op(0x5, dst, src); |
642 } | 642 } |
643 | 643 |
644 void testb(Register reg, Immediate mask); | 644 void testb(Register reg, Immediate mask); |
645 void testb(const Operand& op, Immediate mask); | 645 void testb(const Operand& op, Immediate mask); |
646 void testl(Register reg, Immediate mask); | 646 void testl(Register reg, Immediate mask); |
647 void testl(const Operand& op, Immediate mask); | 647 void testl(const Operand& op, Immediate mask); |
648 void testq(const Operand& op, Register reg); | 648 void testq(const Operand& op, Register reg); |
649 void testq(Register dst, Register src); | 649 void testq(Register dst, Register src); |
| 650 void testq(Register dst, Immediate mask); |
650 | 651 |
651 void xor_(Register dst, Register src) { | 652 void xor_(Register dst, Register src) { |
652 arithmetic_op(0x33, dst, src); | 653 arithmetic_op(0x33, dst, src); |
653 } | 654 } |
654 | 655 |
655 void xor_(Register dst, const Operand& src) { | 656 void xor_(Register dst, const Operand& src) { |
656 arithmetic_op(0x33, dst, src); | 657 arithmetic_op(0x33, dst, src); |
657 } | 658 } |
658 | 659 |
659 void xor_(const Operand& dst, Register src) { | 660 void xor_(const Operand& dst, Register src) { |
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1034 private: | 1035 private: |
1035 Assembler* assembler_; | 1036 Assembler* assembler_; |
1036 #ifdef DEBUG | 1037 #ifdef DEBUG |
1037 int space_before_; | 1038 int space_before_; |
1038 #endif | 1039 #endif |
1039 }; | 1040 }; |
1040 | 1041 |
1041 } } // namespace v8::internal | 1042 } } // namespace v8::internal |
1042 | 1043 |
1043 #endif // V8_X64_ASSEMBLER_X64_H_ | 1044 #endif // V8_X64_ASSEMBLER_X64_H_ |
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