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Side by Side Diff: src/x64/assembler-x64-inl.h

Issue 114085: X64: Implement CEntryStub and JSEntryTrampoline. (Closed)
Patch Set: Addressed review comments Created 11 years, 6 months ago
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1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 231 matching lines...) Expand 10 before | Expand all | Expand 10 after
242 242
243 Object** RelocInfo::call_object_address() { 243 Object** RelocInfo::call_object_address() {
244 UNIMPLEMENTED(); // IA32 code below. 244 UNIMPLEMENTED(); // IA32 code below.
245 ASSERT(IsCallInstruction()); 245 ASSERT(IsCallInstruction());
246 return reinterpret_cast<Object**>(pc_ + 1); 246 return reinterpret_cast<Object**>(pc_ + 1);
247 } 247 }
248 248
249 // ----------------------------------------------------------------------------- 249 // -----------------------------------------------------------------------------
250 // Implementation of Operand 250 // Implementation of Operand
251 251
252 Operand::Operand(Register base, int32_t disp) {
253 len_ = 1;
254 if (base.is(rsp) || base.is(r12)) {
255 // SIB byte is needed to encode (rsp + offset) or (r12 + offset).
256 set_sib(kTimes1, rsp, base);
257 }
258
259 if (disp == 0 && !base.is(rbp) && !base.is(r13)) {
260 set_modrm(0, rsp);
261 } else if (is_int8(disp)) {
262 set_modrm(1, base);
263 set_disp8(disp);
264 } else {
265 set_modrm(2, base);
266 set_disp32(disp);
267 }
268 }
269
270 void Operand::set_modrm(int mod, Register rm) { 252 void Operand::set_modrm(int mod, Register rm) {
271 ASSERT((mod & -4) == 0); 253 ASSERT((mod & -4) == 0);
272 buf_[0] = mod << 6 | (rm.code() & 0x7); 254 buf_[0] = mod << 6 | (rm.code() & 0x7);
273 // Set REX.B to the high bit of rm.code(). 255 // Set REX.B to the high bit of rm.code().
274 rex_ |= (rm.code() >> 3); 256 rex_ |= (rm.code() >> 3);
275 } 257 }
276 258
277 259
278 void Operand::set_sib(ScaleFactor scale, Register index, Register base) { 260 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
279 ASSERT(len_ == 1); 261 ASSERT(len_ == 1);
(...skipping 17 matching lines...) Expand all
297 ASSERT(len_ == 1 || len_ == 2); 279 ASSERT(len_ == 1 || len_ == 2);
298 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); 280 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
299 *p = disp; 281 *p = disp;
300 len_ += sizeof(int32_t); 282 len_ += sizeof(int32_t);
301 } 283 }
302 284
303 285
304 } } // namespace v8::internal 286 } } // namespace v8::internal
305 287
306 #endif // V8_X64_ASSEMBLER_X64_INL_H_ 288 #endif // V8_X64_ASSEMBLER_X64_INL_H_
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