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| 1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
| (...skipping 26 matching lines...) Expand all Loading... |
| 37 return static_cast<Condition>(cc ^ 1); | 37 return static_cast<Condition>(cc ^ 1); |
| 38 } | 38 } |
| 39 | 39 |
| 40 | 40 |
| 41 // ----------------------------------------------------------------------------- | 41 // ----------------------------------------------------------------------------- |
| 42 // Implementation of Assembler | 42 // Implementation of Assembler |
| 43 | 43 |
| 44 #define EMIT(x) \ | 44 #define EMIT(x) \ |
| 45 *pc_++ = (x) | 45 *pc_++ = (x) |
| 46 | 46 |
| 47 void Assembler::emit(uint32_t x) { |
| 48 *reinterpret_cast<uint32_t*>(pc_) = x; |
| 49 pc_ += sizeof(uint32_t); |
| 50 } |
| 47 | 51 |
| 48 void Assembler::emit_rex_64(Register reg, Register rm_reg) { | 52 void Assembler::emit_rex_64(Register reg, Register rm_reg) { |
| 49 EMIT(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3); | 53 EMIT(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3); |
| 50 } | 54 } |
| 51 | 55 |
| 52 | 56 |
| 53 void Assembler::emit_rex_64(Register reg, const Operand& op) { | 57 void Assembler::emit_rex_64(Register reg, const Operand& op) { |
| 54 EMIT(0x48 | (reg.code() & 0x8) >> 1 | op.rex_); | 58 EMIT(0x48 | (reg.code() & 0x8) >> 1 | op.rex_); |
| 55 } | 59 } |
| 56 | 60 |
| (...skipping 142 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 199 | 203 |
| 200 | 204 |
| 201 Operand::Operand(Register reg) { | 205 Operand::Operand(Register reg) { |
| 202 // reg | 206 // reg |
| 203 set_modrm(3, reg); | 207 set_modrm(3, reg); |
| 204 } | 208 } |
| 205 | 209 |
| 206 } } // namespace v8::internal | 210 } } // namespace v8::internal |
| 207 | 211 |
| 208 #endif // V8_X64_ASSEMBLER_X64_INL_H_ | 212 #endif // V8_X64_ASSEMBLER_X64_INL_H_ |
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