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Side by Side Diff: src/x64/assembler-x64-inl.h

Issue 113761: Add missing file to change 2030. x64/assembler-x64-inl.h was not uploaded. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 11 years, 7 months ago
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1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 19 matching lines...) Expand all
30 30
31 #include "cpu.h" 31 #include "cpu.h"
32 32
33 namespace v8 { namespace internal { 33 namespace v8 { namespace internal {
34 34
35 Condition NegateCondition(Condition cc) { 35 Condition NegateCondition(Condition cc) {
36 return static_cast<Condition>(cc ^ 1); 36 return static_cast<Condition>(cc ^ 1);
37 } 37 }
38 38
39 39
40 // -----------------------------------------------------------------------------
41 // Implementation of Assembler
42
43 #define EMIT(x) \
44 *pc_++ = (x)
iposva 2009/05/22 15:50:23 Is there any particular reason why this has to be
45
46
47 void Assembler::emit_rex_64(Register reg, Register rm_reg) {
48 EMIT(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
49 }
50
51
52 void Assembler::emit_rex_64(Register reg, const Operand& op) {
53 EMIT(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
54 }
55
56
57 void Assembler::set_target_address_at(byte* location, byte* value) {
58 UNIMPLEMENTED();
59 }
60
61
62 byte* Assembler::target_address_at(byte* location) {
63 UNIMPLEMENTED();
64 return NULL;
65 }
66
67 #undef EMIT
68
69
70 // -----------------------------------------------------------------------------
71 // Implementation of RelocInfo
72
40 // The modes possibly affected by apply must be in kApplyMask. 73 // The modes possibly affected by apply must be in kApplyMask.
41 void RelocInfo::apply(int delta) { 74 void RelocInfo::apply(int delta) {
42 if (rmode_ == RUNTIME_ENTRY || IsCodeTarget(rmode_)) { 75 if (rmode_ == RUNTIME_ENTRY || IsCodeTarget(rmode_)) {
43 intptr_t* p = reinterpret_cast<intptr_t*>(pc_); 76 intptr_t* p = reinterpret_cast<intptr_t*>(pc_);
44 *p -= delta; // relocate entry 77 *p -= delta; // relocate entry
45 } else if (rmode_ == JS_RETURN && IsCallInstruction()) { 78 } else if (rmode_ == JS_RETURN && IsCallInstruction()) {
46 // Special handling of js_return when a break point is set (call 79 // Special handling of js_return when a break point is set (call
47 // instruction has been inserted). 80 // instruction has been inserted).
48 intptr_t* p = reinterpret_cast<intptr_t*>(pc_ + 1); 81 intptr_t* p = reinterpret_cast<intptr_t*>(pc_ + 1);
49 *p -= delta; // relocate entry 82 *p -= delta; // relocate entry
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64 Address RelocInfo::target_address_address() { 97 Address RelocInfo::target_address_address() {
65 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 98 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
66 return reinterpret_cast<Address>(pc_); 99 return reinterpret_cast<Address>(pc_);
67 } 100 }
68 101
69 102
70 void RelocInfo::set_target_address(Address target) { 103 void RelocInfo::set_target_address(Address target) {
71 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 104 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
72 Assembler::set_target_address_at(pc_, target); 105 Assembler::set_target_address_at(pc_, target);
73 } 106 }
74
75
76 void Assembler::set_target_address_at(byte* location, byte* value) {
77 UNIMPLEMENTED();
78 }
79
80
81 byte* Assembler::target_address_at(byte* location) {
82 UNIMPLEMENTED();
83 return NULL;
84 }
85
86
87 Object* RelocInfo::target_object() { 107 Object* RelocInfo::target_object() {
88 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 108 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
89 return *reinterpret_cast<Object**>(pc_); 109 return *reinterpret_cast<Object**>(pc_);
90 } 110 }
91 111
92 112
93 Object** RelocInfo::target_object_address() { 113 Object** RelocInfo::target_object_address() {
94 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 114 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
95 return reinterpret_cast<Object**>(pc_); 115 return reinterpret_cast<Object**>(pc_);
96 } 116 }
(...skipping 89 matching lines...) Expand 10 before | Expand all | Expand 10 after
186 206
187 207
188 Operand::Operand(Register reg) { 208 Operand::Operand(Register reg) {
189 // reg 209 // reg
190 set_modrm(3, reg); 210 set_modrm(3, reg);
191 } 211 }
192 212
193 } } // namespace v8::internal 213 } } // namespace v8::internal
194 214
195 #endif // V8_X64_ASSEMBLER_X64_INL_H_ 215 #endif // V8_X64_ASSEMBLER_X64_INL_H_
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