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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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170 | 170 |
171 | 171 |
172 void Operand::set_disp32(int32_t disp) { | 172 void Operand::set_disp32(int32_t disp) { |
173 ASSERT(len_ == 1 || len_ == 2); | 173 ASSERT(len_ == 1 || len_ == 2); |
174 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); | 174 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); |
175 *p = disp; | 175 *p = disp; |
176 len_ += sizeof(int32_t); | 176 len_ += sizeof(int32_t); |
177 } | 177 } |
178 | 178 |
179 | 179 |
180 void Operand::set_dispr(intptr_t disp, RelocInfo::Mode rmode) { | |
181 // This cannot be used in 64-bit mode. A 64-bit displacement | |
182 // cannot be encoded, so relocatable 64-bit values must be | |
183 // loaded as immediates. | |
184 UNIMPLEMENTED(); | |
185 } | |
186 | |
187 | |
188 Operand::Operand(Register reg) { | 180 Operand::Operand(Register reg) { |
189 // reg | 181 // reg |
190 set_modrm(3, reg); | 182 set_modrm(3, reg); |
191 } | 183 } |
192 | 184 |
193 } } // namespace v8::internal | 185 } } // namespace v8::internal |
194 | 186 |
195 #endif // V8_X64_ASSEMBLER_X64_INL_H_ | 187 #endif // V8_X64_ASSEMBLER_X64_INL_H_ |
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