Allow a few more (multiple-entry) deferred code snippets to take the...

src/ia32/codegen-ia32.cc

 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 4866 matching lines @@
     //
     // We combine the overflow and the smi check if we could
     // successfully allocate a temporary byte register.
     if (tmp.is_valid()) {
       __ setcc(overflow, tmp.reg());
       __ or_(Operand(tmp.reg()), value.reg());
       __ test(tmp.reg(), Immediate(kSmiTagMask));
       tmp.Unuse();
       deferred->enter()->Branch(not_zero, &value, not_taken);
     } else {  // Otherwise we test separately for overflow and smi check.
+      deferred->SetEntryFrame(&value);
       deferred->enter()->Branch(overflow, &value, not_taken);
       __ test(value.reg(), Immediate(kSmiTagMask));
       deferred->enter()->Branch(not_zero, &value, not_taken);
     }
 
     // Store the new value in the target if not const.
     deferred->BindExit(&value);
     frame_->Push(&value);
     if (!is_const) {
       target.SetValue(NOT_CONST_INIT);
@@ skipping 836 matching lines @@
   ASSERT(answer.is_valid());
   // Perform the smi check.
   if (left->reg().is(right->reg())) {
     __ test(left->reg(), Immediate(kSmiTagMask));
   } else {
     __ mov(answer.reg(), left->reg());
     __ or_(answer.reg(), Operand(right->reg()));
     ASSERT(kSmiTag == 0);  // adjust zero check if not the case
     __ test(answer.reg(), Immediate(kSmiTagMask));
   }
-  enter()->Branch(not_zero, left, right, not_taken);
-
-  // All operations start by copying the left argument into answer.
-  __ mov(answer.reg(), left->reg());
   switch (op_) {
     case Token::ADD:
+      SetEntryFrame(left, right);
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       __ add(answer.reg(), Operand(right->reg()));  // add optimistically
       enter()->Branch(overflow, left, right, not_taken);
       break;
 
     case Token::SUB:
+      SetEntryFrame(left, right);
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       __ sub(answer.reg(), Operand(right->reg()));  // subtract optimistically
       enter()->Branch(overflow, left, right, not_taken);
       break;
 
     case Token::MUL: {
+      SetEntryFrame(left, right);
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       // If the smi tag is 0 we can just leave the tag on one operand.
       ASSERT(kSmiTag == 0);  // adjust code below if not the case
       // Remove tag from the left operand (but keep sign).
       // Left hand operand has been copied into answer.
       __ sar(answer.reg(), kSmiTagSize);
       // Do multiplication of smis, leaving result in answer.
       __ imul(answer.reg(), Operand(right->reg()));
       // Go slow on overflows.
       enter()->Branch(overflow, left, right, not_taken);
       // Check for negative zero result.  If product is zero,
       // and one argument is negative, go to slow case.
       // The frame is unchanged in this block, so local control flow can
       // use a Label rather than a JumpTarget.
       Label non_zero_result;
       __ test(answer.reg(), Operand(answer.reg()));
       __ j(not_zero, &non_zero_result, taken);
       __ mov(answer.reg(), left->reg());
       __ or_(answer.reg(), Operand(right->reg()));
       enter()->Branch(negative, left, right, not_taken);
       __ xor_(answer.reg(), Operand(answer.reg()));  // Positive 0 is correct.
       __ bind(&non_zero_result);
       break;
     }
 
     case Token::DIV:  // Fall through.
     case Token::MOD: {
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       // Div and mod use the registers eax and edx.  Left and right must
       // be preserved, because the original operands are needed if we switch
       // to the slow case.  Move them if either is in eax or edx.
       // The Result answer should be changed into an alias for eax.
       // Precondition:
       // The Results left and right are valid.  They may be the same register,
       // and may be unspilled.  The Result answer is valid and is distinct
       // from left and right, and is spilled.
       // The value in left is copied to answer.
 
@@ skipping 117 matching lines @@
         __ j(not_zero, &non_zero_result, taken);
         __ test(left->reg(), Operand(left->reg()));
         enter()->Branch(negative, left, right, not_taken);
         __ bind(&non_zero_result);
         // The answer is in edx.
         answer = reg_edx;
       }
       break;
     }
     case Token::BIT_OR:
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       __ or_(answer.reg(), Operand(right->reg()));
       break;
 
     case Token::BIT_AND:
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       __ and_(answer.reg(), Operand(right->reg()));
       break;
 
     case Token::BIT_XOR:
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       __ xor_(answer.reg(), Operand(right->reg()));
       break;
 
     case Token::SHL:
     case Token::SHR:
     case Token::SAR:
+      enter()->Branch(not_zero, left, right, not_taken);
+      __ mov(answer.reg(), left->reg());
       // Move right into ecx.
       // Left is in two registers already, so even if left or answer is ecx,
       // we can move right to it, and use the other one.
       // Right operand must be in register cl because x86 likes it that way.
       if (right->reg().is(ecx)) {
         // Right is already in the right place.  Left may be in the
         // same register, which causes problems. Always use answer
         // instead of left, even if left is not ecx, since this avoids
         // spilling left.
         *left = answer;
@@ skipping 1311 matching lines @@
 
   // Slow-case: Go through the JavaScript implementation.
   __ bind(&slow);
   __ InvokeBuiltin(Builtins::INSTANCE_OF, JUMP_FUNCTION);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal