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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 204 B22 = 1 << 22, | 204 B22 = 1 << 22, |
| 205 B23 = 1 << 23, | 205 B23 = 1 << 23, |
| 206 B24 = 1 << 24, | 206 B24 = 1 << 24, |
| 207 B25 = 1 << 25, | 207 B25 = 1 << 25, |
| 208 B26 = 1 << 26, | 208 B26 = 1 << 26, |
| 209 B27 = 1 << 27, | 209 B27 = 1 << 27, |
| 210 | 210 |
| 211 // Instruction bit masks | 211 // Instruction bit masks |
| 212 RdMask = 15 << 12, // in str instruction | 212 RdMask = 15 << 12, // in str instruction |
| 213 CondMask = 15 << 28, | 213 CondMask = 15 << 28, |
| 214 CoprocessorMask = 15 << 8, |
| 214 OpCodeMask = 15 << 21, // in data-processing instructions | 215 OpCodeMask = 15 << 21, // in data-processing instructions |
| 215 Imm24Mask = (1 << 24) - 1, | 216 Imm24Mask = (1 << 24) - 1, |
| 216 Off12Mask = (1 << 12) - 1, | 217 Off12Mask = (1 << 12) - 1, |
| 217 // Reserved condition | 218 // Reserved condition |
| 218 nv = 15 << 28 | 219 nv = 15 << 28 |
| 219 }; | 220 }; |
| 220 | 221 |
| 221 | 222 |
| 222 // add(sp, sp, 4) instruction (aka Pop()) | 223 // add(sp, sp, 4) instruction (aka Pop()) |
| 223 static const Instr kPopInstruction = | 224 static const Instr kPopInstruction = |
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| 609 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) { | 610 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) { |
| 610 ASSERT((instr & ~(CondMask | P | U | W | L)) == B27); | 611 ASSERT((instr & ~(CondMask | P | U | W | L)) == B27); |
| 611 ASSERT(rl != 0); | 612 ASSERT(rl != 0); |
| 612 ASSERT(!rn.is(pc)); | 613 ASSERT(!rn.is(pc)); |
| 613 emit(instr | rn.code()*B16 | rl); | 614 emit(instr | rn.code()*B16 | rl); |
| 614 } | 615 } |
| 615 | 616 |
| 616 | 617 |
| 617 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) { | 618 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) { |
| 618 // unindexed addressing is not encoded by this function | 619 // unindexed addressing is not encoded by this function |
| 619 ASSERT((instr & ~(CondMask | P | U | N | W | L)) == (B27 | B26)); | 620 ASSERT_EQ((B27 | B26), |
| 621 (instr & ~(CondMask | CoprocessorMask | P | U | N | W | L))); |
| 620 ASSERT(x.rn_.is_valid() && !x.rm_.is_valid()); | 622 ASSERT(x.rn_.is_valid() && !x.rm_.is_valid()); |
| 621 int am = x.am_; | 623 int am = x.am_; |
| 622 int offset_8 = x.offset_; | 624 int offset_8 = x.offset_; |
| 623 ASSERT((offset_8 & 3) == 0); // offset must be an aligned word offset | 625 ASSERT((offset_8 & 3) == 0); // offset must be an aligned word offset |
| 624 offset_8 >>= 2; | 626 offset_8 >>= 2; |
| 625 if (offset_8 < 0) { | 627 if (offset_8 < 0) { |
| 626 offset_8 = -offset_8; | 628 offset_8 = -offset_8; |
| 627 am ^= U; | 629 am ^= U; |
| 628 } | 630 } |
| 629 ASSERT(is_uint8(offset_8)); // unsigned word offset must fit in a byte | 631 ASSERT(is_uint8(offset_8)); // unsigned word offset must fit in a byte |
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| 1462 bind(&after_pool); | 1464 bind(&after_pool); |
| 1463 } | 1465 } |
| 1464 | 1466 |
| 1465 // Since a constant pool was just emitted, move the check offset forward by | 1467 // Since a constant pool was just emitted, move the check offset forward by |
| 1466 // the standard interval. | 1468 // the standard interval. |
| 1467 next_buffer_check_ = pc_offset() + kCheckConstInterval; | 1469 next_buffer_check_ = pc_offset() + kCheckConstInterval; |
| 1468 } | 1470 } |
| 1469 | 1471 |
| 1470 | 1472 |
| 1471 } } // namespace v8::internal | 1473 } } // namespace v8::internal |
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