Turn ASSERT(!rn.is(ip)) into CHECK so the error can be caught in release mode...

src/assembler-arm.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 536 matching lines @@
     uint32_t rotate_imm;
     uint32_t immed_8;
     if ((x.rmode_ != RelocInfo::NONE &&
          x.rmode_ != RelocInfo::EXTERNAL_REFERENCE) ||
         !fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
       // The immediate operand cannot be encoded as a shifter operand, so load
       // it first to register ip and change the original instruction to use ip.
       // However, if the original instruction is a 'mov rd, x' (not setting the
       // condition code), then replace it with a 'ldr rd, [pc]'
       RecordRelocInfo(x.rmode_, x.imm32_);
-      ASSERT(!rn.is(ip));  // rn should never be ip, or will be trashed
+      CHECK(!rn.is(ip));  // rn should never be ip, or will be trashed
       Condition cond = static_cast<Condition>(instr & CondMask);
       if ((instr & ~CondMask) == 13*B21) {  // mov, S not set
         ldr(rd, MemOperand(pc, 0), cond);
       } else {
         ldr(ip, MemOperand(pc, 0), cond);
         addrmod1(instr, rn, rd, Operand(ip));
       }
       return;
     }
     instr |= I | rotate_imm*B8 | immed_8;
@@ skipping 925 matching lines @@
     bind(&after_pool);
   }
 
   // Since a constant pool was just emitted, move the check offset forward by
   // the standard interval.
   next_buffer_check_ = pc_offset() + kCheckConstInterval;
 }
 
 
 } }  // namespace v8::internal