More work on completing Keyed IC code on ARM port....

More work on completing Keyed IC code on ARM port.
Added stats counter support in macro-assembler-arm.*.


Committed: http://code.google.com/p/v8/source/detail?r=807

[iposva, 2008-11-20 05:17:30]

Tiny comments, otherwise LGTM.

-Ivan

http://codereview.chromium.org/11277/diff/1/5
File src/ic-arm.cc (right):

http://codereview.chromium.org/11277/diff/1/5#newcode472
Line 472: __ stm(db_w, sp, r1.bit() | r3.bit());
Why are you using r1 and r3 here and not r0 and r1? Are r0 and r2 registers
already used for something? If so please document then in the -- State-- above.

http://codereview.chromium.org/11277/diff/1/5#newcode636
Line 636: __ ldr(r1, MemOperand(sp));
Can you use a different register as temporary register in the code above so that
you do not have to reload they key from memory again here?

[Feng Qian, 2008-11-20 16:50:38]

http://codereview.chromium.org/11277/diff/1/5
File src/ic-arm.cc (right):

http://codereview.chromium.org/11277/diff/1/5#newcode472
Line 472: __ stm(db_w, sp, r1.bit() | r3.bit());
All r0 - r3 are available. I cannot remember why I changed r2 to r1, but it
seems an unnecessary change. Reverted.

On 2008/11/20 05:17:30, iposva wrote:
> Why are you using r1 and r3 here and not r0 and r1? Are r0 and r2 registers
> already used for something? If so please document then in the -- State--
above.

http://codereview.chromium.org/11277/diff/1/5#newcode636
Line 636: __ ldr(r1, MemOperand(sp));
On 2008/11/20 05:17:30, iposva wrote:
> Can you use a different register as temporary register in the code above so
that
> you do not have to reload they key from memory again here?

Done.