| Index: src/trusted/validator_arm/validator_huge_tests.cc
|
| diff --git a/src/trusted/validator_arm/validator_huge_tests.cc b/src/trusted/validator_arm/validator_huge_tests.cc
|
| index a6ff9d6c36fa541c71c0182d951979bfdfd7a3a6..78427c48ce2bd22a87eab1042f41dfe785d85553 100644
|
| --- a/src/trusted/validator_arm/validator_huge_tests.cc
|
| +++ b/src/trusted/validator_arm/validator_huge_tests.cc
|
| @@ -106,8 +106,7 @@ TEST_F(ValidatorTests, WholeA32InstructionSpaceTesting) {
|
| uint32_t expected_branch_target_register = expect_bx_or_blx ?
|
| (i & 0xF) : // When present, always Rm(3:0).
|
| nacl_arm_dec::Register::kNone;
|
| - bool expect_literal_pool_head =
|
| - (i == nacl_arm_dec::kLiteralPoolHeadInstruction);
|
| + bool expect_literal_pool_head =(i == nacl_arm_dec::kLiteralPoolHead);
|
| bool expect_load_store_or_unsafe = expect_unconditional ?
|
| // Advanced SIMD element or structure load/store instructions.
|
| // 1111 0100 xx0x xxxx xxxx xxxx xxxx xxxx
|
|
|