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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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735 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. | 735 // Divide rdx:rax by src. Quotient in rax, remainder in rdx. |
736 void idivq(Register src); | 736 void idivq(Register src); |
737 // Divide edx:eax by lower 32 bits of src. Quotient in eax, rem. in edx. | 737 // Divide edx:eax by lower 32 bits of src. Quotient in eax, rem. in edx. |
738 void idivl(Register src); | 738 void idivl(Register src); |
739 | 739 |
740 // Signed multiply instructions. | 740 // Signed multiply instructions. |
741 void imul(Register src); // rdx:rax = rax * src. | 741 void imul(Register src); // rdx:rax = rax * src. |
742 void imul(Register dst, Register src); // dst = dst * src. | 742 void imul(Register dst, Register src); // dst = dst * src. |
743 void imul(Register dst, const Operand& src); // dst = dst * src. | 743 void imul(Register dst, const Operand& src); // dst = dst * src. |
744 void imul(Register dst, Register src, Immediate imm); // dst = src * imm. | 744 void imul(Register dst, Register src, Immediate imm); // dst = src * imm. |
745 // Multiply 32 bit registers | 745 // Signed 32-bit multiply instructions. |
746 void imull(Register dst, Register src); // dst = dst * src. | 746 void imull(Register dst, Register src); // dst = dst * src. |
| 747 void imull(Register dst, Register src, Immediate imm); // dst = src * imm. |
747 | 748 |
748 void incq(Register dst); | 749 void incq(Register dst); |
749 void incq(const Operand& dst); | 750 void incq(const Operand& dst); |
750 void incl(const Operand& dst); | 751 void incl(const Operand& dst); |
751 | 752 |
752 void lea(Register dst, const Operand& src); | 753 void lea(Register dst, const Operand& src); |
| 754 void leal(Register dst, const Operand& src); |
753 | 755 |
754 // Multiply rax by src, put the result in rdx:rax. | 756 // Multiply rax by src, put the result in rdx:rax. |
755 void mul(Register src); | 757 void mul(Register src); |
756 | 758 |
757 void neg(Register dst); | 759 void neg(Register dst); |
758 void neg(const Operand& dst); | 760 void neg(const Operand& dst); |
759 void negl(Register dst); | 761 void negl(Register dst); |
760 | 762 |
761 void not_(Register dst); | 763 void not_(Register dst); |
762 void not_(const Operand& dst); | 764 void not_(const Operand& dst); |
| 765 void notl(Register dst); |
763 | 766 |
764 void or_(Register dst, Register src) { | 767 void or_(Register dst, Register src) { |
765 arithmetic_op(0x0B, dst, src); | 768 arithmetic_op(0x0B, dst, src); |
766 } | 769 } |
767 | 770 |
768 void orl(Register dst, Register src) { | 771 void orl(Register dst, Register src) { |
769 arithmetic_op_32(0x0B, dst, src); | 772 arithmetic_op_32(0x0B, dst, src); |
770 } | 773 } |
771 | 774 |
772 void or_(Register dst, const Operand& src) { | 775 void or_(Register dst, const Operand& src) { |
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1373 private: | 1376 private: |
1374 Assembler* assembler_; | 1377 Assembler* assembler_; |
1375 #ifdef DEBUG | 1378 #ifdef DEBUG |
1376 int space_before_; | 1379 int space_before_; |
1377 #endif | 1380 #endif |
1378 }; | 1381 }; |
1379 | 1382 |
1380 } } // namespace v8::internal | 1383 } } // namespace v8::internal |
1381 | 1384 |
1382 #endif // V8_X64_ASSEMBLER_X64_H_ | 1385 #endif // V8_X64_ASSEMBLER_X64_H_ |
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