Chromium Code Reviews| Index: src/arm/macro-assembler-arm.cc |
| diff --git a/src/arm/macro-assembler-arm.cc b/src/arm/macro-assembler-arm.cc |
| index 29cf434285fa61dbfa742adef9f2e6c264e9901e..cec4a3b146d57d7fe1c4710dea8d3bf87cf2e35e 100644 |
| --- a/src/arm/macro-assembler-arm.cc |
| +++ b/src/arm/macro-assembler-arm.cc |
| @@ -108,7 +108,7 @@ void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode, |
| int MacroAssembler::CallSize(Register target, Condition cond) { |
| -#if USE_BLX |
| +#ifdef USE_BLX |
| return kInstrSize; |
| #else |
| return 2 * kInstrSize; |
| @@ -121,7 +121,7 @@ void MacroAssembler::Call(Register target, Condition cond) { |
| BlockConstPoolScope block_const_pool(this); |
| Label start; |
| bind(&start); |
| -#if USE_BLX |
| +#ifdef USE_BLX |
| blx(target, cond); |
| #else |
| // set lr for return at current pc + 8 |
| @@ -163,10 +163,16 @@ void MacroAssembler::Call(Address target, |
| BlockConstPoolScope block_const_pool(this); |
| Label start; |
| bind(&start); |
| -#if USE_BLX |
| - // On ARMv5 and after the recommended call sequence is: |
| - // ldr ip, [pc, #...] |
| - // blx ip |
| +#ifdef USE_BLX |
| + // Call sequence on V7 or later is : |
| + // movw ip, #... @ call address low 16 |
| + // movt ip, #... @ call address high 16 |
| + // blx ip |
| + // @ return address |
| + // Or pre-V7: |
| + // ldr ip, [pc, #...] @ call address |
| + // blx ip |
| + // @ return address |
| // Statement positions are expected to be recorded when the target |
| // address is loaded. The mov method will automatically record |
| @@ -176,14 +182,11 @@ void MacroAssembler::Call(Address target, |
| mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode)); |
| blx(ip, cond); |
| - |
| - ASSERT(kCallTargetAddressOffset == 2 * kInstrSize); |
| #else |
| // Set lr for return at current pc + 8. |
| mov(lr, Operand(pc), LeaveCC, cond); |
| // Emit a ldr<cond> pc, [pc + offset of target in constant pool]. |
| mov(pc, Operand(reinterpret_cast<int32_t>(target), rmode), LeaveCC, cond); |
| - ASSERT(kCallTargetAddressOffset == kInstrSize); |
| #endif |
| ASSERT_EQ(CallSize(target, rmode, cond), SizeOfCodeGeneratedSince(&start)); |
| } |
| @@ -288,17 +291,15 @@ void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) { |
| void MacroAssembler::And(Register dst, Register src1, const Operand& src2, |
| Condition cond) { |
| if (!src2.is_reg() && |
| - !src2.must_use_constant_pool(this) && |
| + !src2.must_output_reloc_info(this) && |
| src2.immediate() == 0) { |
| mov(dst, Operand(0, RelocInfo::NONE), LeaveCC, cond); |
| - |
| } else if (!src2.is_single_instruction(this) && |
| - !src2.must_use_constant_pool(this) && |
| + !src2.must_output_reloc_info(this) && |
| CpuFeatures::IsSupported(ARMv7) && |
| IsPowerOf2(src2.immediate() + 1)) { |
|
Please use jfb - chromium.org
2012/10/10 13:56:52
It would be kind of silly, but if src2 == 0xffffff
danno
2012/10/17 10:04:44
Possible, but that's for a separate CL.
On 2012/10
|
| ubfx(dst, src1, 0, |
| WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond); |
| - |
| } else { |
| and_(dst, src1, src2, LeaveCC, cond); |
| } |