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Side by Side Diff: src/trusted/validator_ragel/decoder.h

Issue 11000033: Move validator_x86_XX.rl out of unreviewed. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 2 months ago
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1 /* 1 /*
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be 3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file. 4 * found in the LICENSE file.
5 */ 5 */
6 6
7 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ 7 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_
8 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ 8 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_
9 9
10 #include "native_client/src/shared/utils/types.h" 10 #include "native_client/src/shared/utils/types.h"
11 #include "native_client/src/trusted/validator/x86/nacl_cpuid.h" 11 #include "native_client/src/trusted/validator/x86/nacl_cpuid.h"
12 12
13 EXTERN_C_BEGIN 13 EXTERN_C_BEGIN
14 14
15 enum operand_type { 15 enum OperandType {
16
17 /* 16 /*
18 * These are for general-purpose registers, memory access and immediates. 17 * These are for general-purpose registers, memory access and immediates.
19 * They are not used for XMM, MMX etc. 18 * They are not used for XMM, MMX etc.
20 */ 19 */
21 OPERAND_SIZE_2_BIT, /* See VPERMIL2Px instruction for description. */ 20 /* See VPERMIL2Px instruction for description of 2-bit operand type. */
22 OPERAND_SIZE_8_BIT, 21 OPERAND_TYPE_2_BIT,
23 OPERAND_SIZE_16_BIT, 22 /* These are regular-sized operands: GP registers or memory. */
24 OPERAND_SIZE_32_BIT, 23 OPERAND_TYPE_8_BIT,
25 OPERAND_SIZE_64_BIT, 24 OPERAND_TYPE_16_BIT,
26 OPERAND_SIZE_128_BIT, 25 OPERAND_TYPE_32_BIT,
27 OPERAND_SIZE_256_BIT, 26 OPERAND_TYPE_64_BIT,
27 OPERAND_TYPE_128_BIT,
28 OPERAND_TYPE_256_BIT,
28 29
29 /* OPERAND_FLOAT_SIZE_*_BIT are used for in-memory operands. */ 30 /* Non-GP registers. */
30 OPERAND_FLOAT_SIZE_16_BIT,
31 OPERAND_FLOAT_SIZE_32_BIT,
32 OPERAND_FLOAT_SIZE_64_BIT,
33 OPERAND_FLOAT_SIZE_80_BIT,
34
35 /* OPERAND_X87_SIZE_64_BIT are signed integers in memory.*/
36 OPERAND_X87_SIZE_16_BIT,
37 OPERAND_X87_SIZE_32_BIT,
38 OPERAND_X87_SIZE_64_BIT,
39
40
41 OPERAND_X87_BCD, /* 10-byte packed BCD value in memory. */
42 OPERAND_X87_ENV, /* A 14-byte or 28-byte x87 environment. */
43 OPERAND_X87_STATE, /* A 94-byte or 108-byte x87 state. */
44 OPERAND_X87_MMX_MM_STATE, /* A 512-byte extended x87/MMX/XMM state. */
45 OPERAND_SELECTOR, /* Operand is 6/10 bytes selector in memory. */
46 OPERAND_FAR_PTR, /* Operand is 6/10 bytes far pointer in memory. */
47
48 OPERAND_ST, /* Any X87 register. */ 31 OPERAND_ST, /* Any X87 register. */
49 OPERAND_SEGMENT_REGISTER, /* Operand is segment register: %{e,c,s,d,f,g}s. */ 32 OPERAND_SEGMENT_REGISTER, /* Operand is segment register: %{e,c,s,d,f,g}s. */
50 OPERAND_CONTROL_REGISTER, /* Operand is control register: %crX. */ 33 OPERAND_CONTROL_REGISTER, /* Operand is control register: %crX. */
51 OPERAND_DEBUG_REGISTER, /* Operand is debug register: %drX. */ 34 OPERAND_DEBUG_REGISTER, /* Operand is debug register: %drX. */
52 OPERAND_MMX, 35 OPERAND_MMX,
53 OPERAND_XMM, 36 OPERAND_XMM,
54 OPERAND_YMM 37 OPERAND_YMM
38
39 /* OPERAND_FLOAT_SIZE_*_BIT are used for in-memory operands. */
40 OPERAND_TYPE_FLOAT_16_BIT,
41 OPERAND_TYPE_FLOAT_32_BIT,
42 OPERAND_TYPE_FLOAT_64_BIT,
43 OPERAND_TYPE_FLOAT_80_BIT,
44
45 /* OPERAND_X87_SIZE_*_BIT are signed integers in memory.*/
46 OPERAND_TYPE_X87_16_BIT,
47 OPERAND_TYPE_X87_32_BIT,
48 OPERAND_TYPE_X87_64_BIT,
49
50 /* Miscellaneous structures in memory. */
51 OPERAND_TYPE_X87_BCD, /* 10-byte packed BCD value. */
52 OPERAND_TYPE_X87_ENV, /* A 14-byte or 28-byte x87 environment. */
53 OPERAND_TYPE_X87_STATE, /* A 94-byte or 108-byte x87 state. */
54 OPERAND_TYPE_X87_MMX_MM_STATE, /* A 512-byte extended x87/MMX/XMM state. */
55 OPERAND_TYPE_SELECTOR, /* Operand is 6/10 bytes selector. */
56 OPERAND_TYPE_FAR_PTR, /* Operand is 6/10 bytes far pointer. */
57
55 }; 58 };
56 59
57 enum register_name { 60 enum OperandName {
58 /* First 16 registers are compatible with encoding of registers in x86 ABI. */ 61 /* First 16 registers are compatible with encoding of registers in x86 ABI. */
59 REG_RAX, 62 REG_RAX,
60 REG_RCX, 63 REG_RCX,
61 REG_RDX, 64 REG_RDX,
62 REG_RBX, 65 REG_RBX,
63 REG_RSP, 66 REG_RSP,
64 REG_RBP, 67 REG_RBP,
65 REG_RSI, 68 REG_RSI,
66 REG_RDI, 69 REG_RDI,
67 REG_R8, 70 REG_R8,
(...skipping 13 matching lines...) Expand all
81 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */ 84 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */
82 REG_ES_RDI, /* For string instructions: %es:(%rsi). */ 85 REG_ES_RDI, /* For string instructions: %es:(%rsi). */
83 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */ 86 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */
84 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */ 87 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */
85 NO_REG, /* For modrm: both index and base can be absent. */ 88 NO_REG, /* For modrm: both index and base can be absent. */
86 REG_ST, /* For x87 instructions: implicit %st. */ 89 REG_ST, /* For x87 instructions: implicit %st. */
87 JMP_TO /* Operand is jump target address: usually %rip+offset. */ 90 JMP_TO /* Operand is jump target address: usually %rip+offset. */
88 }; 91 };
89 92
90 /* 93 /*
91 * This enum extends NaClCPUFeatureID to cover instructions not recognized in 94 * Displacement can be of four different sizes in x86 instruction set: nothing,
92 * 95 * 8-bit, 16-bit, 32-bit, and 64-bit. These are traditionally threated slightly
93 * / 96 * differently by decoders: 8-bit are usually printed as signed offset, while
94 enum DecoderCPUFeatures { 97 * 32-bit (in ia32 mode) and 64-bit (in amd64 mode) are printed as unsigned
95 }; 98 * offset.
96 */ 99 */
97 100 enum DisplacementMode {
98 enum disp_mode {
99 DISPNONE, 101 DISPNONE,
100 DISP8, 102 DISP8,
101 DISP16, 103 DISP16,
102 DISP32, 104 DISP32,
103 DISP64, 105 DISP64,
104 }; 106 };
105 107
108 /*
109 * Structure which encodes the instruction. Used to pass the information about
110 * the instruction to process_instruction_func callback.
111 */
106 struct instruction { 112 struct instruction {
107 const char *name; 113 const char *name;
108 unsigned char operands_count; 114 unsigned char operands_count;
109 struct { 115 struct {
110 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */ 116 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */
117 /*
118 * Here the difference between compilers raises it's ugly head. What we
119 * really want to have here is C99's _Bool. Unfortunately MSVC does not
120 * offer it. We have Bool typedef which works fine on MSVC but sadly
121 * generates warnings when used with GCC.
122 */
111 #ifdef _MSC_VER 123 #ifdef _MSC_VER
112 Bool data16:1; /* "Normal", non-rex prefixes. */ 124 Bool data16:1; /* "Normal", non-rex prefixes. */
113 Bool lock:1; 125 Bool lock:1;
114 Bool repnz:1; 126 Bool repnz:1;
115 Bool repz:1; 127 Bool repz:1;
116 Bool branch_not_taken:1; 128 Bool branch_not_taken:1;
117 Bool branch_taken:1; 129 Bool branch_taken:1;
118 #else 130 #else
119 _Bool data16:1; /* "Normal", non-rex prefixes. */ 131 _Bool data16:1; /* "Normal", non-rex prefixes. */
120 _Bool lock:1; 132 _Bool lock:1;
121 _Bool repnz:1; 133 _Bool repnz:1;
122 _Bool repz:1; 134 _Bool repz:1;
123 _Bool branch_not_taken:1; 135 _Bool branch_not_taken:1;
124 _Bool branch_taken:1; 136 _Bool branch_taken:1;
125 #endif 137 #endif
126 } prefix; 138 } prefix;
127 struct { 139 struct {
128 enum register_name name; 140 enum OperandName name;
129 enum operand_type type; 141 enum OperandType type;
130 } operands[5]; 142 } operands[5];
131 struct { 143 struct {
132 enum register_name base; 144 enum OperandName base; /* Can be RAX ... R15, or NO_REG. */
133 enum register_name index; 145 enum OperandName index; /* Can be RAX ... R15, or RIP, RIZ, or NO_REG */
134 int scale; 146 int scale;
135 int64_t offset; 147 int64_t offset;
136 enum disp_mode disp_type; 148 enum DisplacementMode disp_type;
137 } rm; 149 } rm;
138 uint64_t imm[2]; 150 uint64_t imm[2];
139 }; 151 };
140 152
141 typedef void (*process_instruction_func) (const uint8_t *begin, 153 typedef void (*process_instruction_func) (const uint8_t *begin,
142 const uint8_t *end, 154 const uint8_t *end,
143 struct instruction *instruction, 155 struct instruction *instruction,
144 void *userdata); 156 void *userdata);
145 157
146 typedef void (*process_decoding_error_func) (const uint8_t *ptr, 158 typedef void (*process_decoding_error_func) (const uint8_t *ptr,
147 void *userdata); 159 void *userdata);
148 160
149 /* All possible CPUID features enabled. */ 161 /* All possible CPUID features enabled. */
150 extern const NaClCPUFeaturesX86 full_cpuid_features; 162 extern const NaClCPUFeaturesX86 kFullCPUIDFeatures;
151 163
152 int DecodeChunkAMD64(const uint8_t *data, size_t size, 164 int DecodeChunkAMD64(const uint8_t *data, size_t size,
153 process_instruction_func process_instruction, 165 process_instruction_func process_instruction,
154 process_decoding_error_func process_error, void *userdata); 166 process_decoding_error_func process_error, void *userdata);
155 167
156 int DecodeChunkIA32(const uint8_t *data, size_t size, 168 int DecodeChunkIA32(const uint8_t *data, size_t size,
157 process_instruction_func process_instruction, 169 process_instruction_func process_instruction,
158 process_decoding_error_func process_error, void *userdata); 170 process_decoding_error_func process_error, void *userdata);
159 171
160 EXTERN_C_END 172 EXTERN_C_END
161 173
162 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ */ 174 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ */
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