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1 /* | 1 /* |
2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. |
Brad Chen
2012/09/28 20:41:01
2012? Can't remember what the lawyers latest guida
khim
2012/09/28 23:22:06
Script accepts both 2011 and 2012. Fixed.
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3 * Use of this source code is governed by a BSD-style license that can be | 3 * Use of this source code is governed by a BSD-style license that can be |
4 * found in the LICENSE file. | 4 * found in the LICENSE file. |
5 */ | 5 */ |
6 | 6 |
7 #include <assert.h> | 7 #include <assert.h> |
Brad Chen
2012/09/28 20:41:01
What is this file for? Does it get used when build
khim
2012/09/28 23:22:06
This file is only used to test stand-alone decoder
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8 #include <stddef.h> | 8 #include <stddef.h> |
9 #include <stdio.h> | 9 #include <stdio.h> |
10 #include <stdlib.h> | 10 #include <stdlib.h> |
11 #include <string.h> | 11 #include <string.h> |
12 | 12 |
13 #include "native_client/src/shared/utils/types.h" | 13 #include "native_client/src/shared/utils/types.h" |
14 #include "native_client/src/trusted/validator_ragel/unreviewed/decoder_internal. h" | 14 #include "native_client/src/trusted/validator_ragel/unreviewed/decoder_internal. h" |
15 | 15 |
16 #include "native_client/src/trusted/validator_ragel/gen/decoder_x86_32_instructi on_consts.h" | 16 #include "native_client/src/trusted/validator_ragel/gen/decoder_x86_32_instructi on_consts.h" |
17 | 17 |
(...skipping 31 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
49 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; | 49 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; |
50 include relative_fields_actions | 50 include relative_fields_actions |
51 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; | 51 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; |
52 include relative_fields_parsing | 52 include relative_fields_parsing |
53 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; | 53 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; |
54 include cpuid_actions | 54 include cpuid_actions |
55 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; | 55 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl"; |
56 | 56 |
57 include decode_x86_32 "decoder_x86_32_instruction.rl"; | 57 include decode_x86_32 "decoder_x86_32_instruction.rl"; |
58 | 58 |
59 main := (one_instruction | 59 main := (one_instruction |
Brad Chen
2012/09/28 20:41:01
This procedure would be more readable if you made
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60 @{ | 60 @{ |
61 switch (instruction.rm.disp_type) { | 61 switch (instruction.rm.disp_type) { |
62 case DISPNONE: instruction.rm.offset = 0; break; | 62 case DISPNONE: instruction.rm.offset = 0; break; |
Brad Chen
2012/09/28 20:41:01
One statement per line? Nothing after the colon pl
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63 case DISP8: instruction.rm.offset = (int8_t) *disp; break; | 63 case DISP8: instruction.rm.offset = (int8_t) *disp; break; |
64 case DISP16: instruction.rm.offset = | 64 case DISP16: instruction.rm.offset = |
Brad Chen
2012/09/28 20:41:01
This is a horrible line break.
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65 (int16_t) (disp[0] + 256U * disp[1]); | 65 (int16_t) (disp[0] + 256U * disp[1]); |
66 break; | 66 break; |
67 case DISP32: instruction.rm.offset = (int32_t) | 67 case DISP32: instruction.rm.offset = (int32_t) |
68 (disp[0] + 256U * (disp[1] + 256U * (disp[2] + 256U * (disp[3])))); | 68 (disp[0] + 256U * (disp[1] + 256U * (disp[2] + 256U * (disp[3])))); |
69 break; | 69 break; |
70 case DISP64: assert(FALSE); | 70 case DISP64: assert(FALSE); |
Brad Chen
2012/09/28 20:41:01
The style guide requires a default case. I might l
khim
2012/09/28 23:22:06
This is how our code is built.
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71 } | 71 } |
72 switch (imm_operand) { | 72 switch (imm_operand) { |
73 case IMMNONE: instruction.imm[0] = 0; break; | 73 case IMMNONE: instruction.imm[0] = 0; break; |
74 case IMM2: instruction.imm[0] = imm[0] & 0x03; break; | 74 case IMM2: instruction.imm[0] = imm[0] & 0x03; break; |
75 case IMM8: instruction.imm[0] = imm[0]; break; | 75 case IMM8: instruction.imm[0] = imm[0]; break; |
76 case IMM16: instruction.imm[0] = (uint64_t) (*imm + 256U * (imm[1])); | 76 case IMM16: instruction.imm[0] = (uint64_t) (*imm + 256U * (imm[1])); |
77 break; | 77 break; |
78 case IMM32: instruction.imm[0] = (uint64_t) | 78 case IMM32: instruction.imm[0] = (uint64_t) |
79 (imm[0] + 256U * (imm[1] + 256U * (imm[2] + 256U * (imm[3])))); | 79 (imm[0] + 256U * (imm[1] + 256U * (imm[2] + 256U * (imm[3])))); |
80 break; | 80 break; |
(...skipping 25 matching lines...) Expand all Loading... | |
106 })* | 106 })* |
107 $!{ process_error(current_position, userdata); | 107 $!{ process_error(current_position, userdata); |
108 result = FALSE; | 108 result = FALSE; |
109 goto error_detected; | 109 goto error_detected; |
110 }; | 110 }; |
111 | 111 |
112 }%% | 112 }%% |
113 | 113 |
114 %% write data; | 114 %% write data; |
115 | 115 |
116 #define GET_VEX_PREFIX3() vex_prefix3 | 116 #define GET_VEX_PREFIX3() vex_prefix3 |
Brad Chen
2012/09/28 20:41:01
It looks like this macro is defined identically in
khim
2013/03/08 17:59:53
Done.
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117 #define SET_VEX_PREFIX3(P) vex_prefix3 = (P) | 117 #define SET_VEX_PREFIX3(P) vex_prefix3 = (P) |
118 #define SET_DATA16_PREFIX(S) instruction.prefix.data16 = (S) | 118 #define SET_DATA16_PREFIX(S) instruction.prefix.data16 = (S) |
119 #define SET_LOCK_PREFIX(S) instruction.prefix.lock = (S) | 119 #define SET_LOCK_PREFIX(S) instruction.prefix.lock = (S) |
120 #define SET_REPZ_PREFIX(S) instruction.prefix.repz = (S) | 120 #define SET_REPZ_PREFIX(S) instruction.prefix.repz = (S) |
121 #define SET_REPNZ_PREFIX(S) instruction.prefix.repnz = (S) | 121 #define SET_REPNZ_PREFIX(S) instruction.prefix.repnz = (S) |
122 #define SET_BRANCH_TAKEN(S) instruction.prefix.branch_taken = (S) | 122 #define SET_BRANCH_TAKEN(S) instruction.prefix.branch_taken = (S) |
123 #define SET_BRANCH_NOT_TAKEN(S) instruction.prefix.branch_not_taken = (S) | 123 #define SET_BRANCH_NOT_TAKEN(S) instruction.prefix.branch_not_taken = (S) |
124 #define SET_INSTRUCTION_NAME(N) instruction.name = (N) | 124 #define SET_INSTRUCTION_NAME(N) instruction.name = (N) |
125 #define GET_OPERAND_NAME(N) instruction.operands[(N)].name | 125 #define GET_OPERAND_NAME(N) instruction.operands[(N)].name |
126 #define SET_OPERAND_NAME(N, S) instruction.operands[(N)].name = (S) | 126 #define SET_OPERAND_NAME(N, S) instruction.operands[(N)].name = (S) |
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148 IMMNONE, | 148 IMMNONE, |
149 IMM2, | 149 IMM2, |
150 IMM8, | 150 IMM8, |
151 IMM16, | 151 IMM16, |
152 IMM32 | 152 IMM32 |
153 }; | 153 }; |
154 | 154 |
155 int DecodeChunkIA32(const uint8_t *data, size_t size, | 155 int DecodeChunkIA32(const uint8_t *data, size_t size, |
156 process_instruction_func process_instruction, | 156 process_instruction_func process_instruction, |
157 process_decoding_error_func process_error, void *userdata) { | 157 process_decoding_error_func process_error, void *userdata) { |
158 const uint8_t *current_position = data; | 158 const uint8_t *current_position = data; |
Brad Chen
2012/09/28 20:41:01
Looks like the latest style guide prescribes the '
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159 const uint8_t *end_of_data = data + size; | 159 const uint8_t *end_of_data = data + size; |
160 const uint8_t *disp = NULL; | 160 const uint8_t *disp = NULL; |
161 const uint8_t *imm = NULL; | 161 const uint8_t *imm = NULL; |
162 const uint8_t *imm2 = NULL; | 162 const uint8_t *imm2 = NULL; |
163 const uint8_t *instruction_start = current_position; | 163 const uint8_t *instruction_start = current_position; |
164 uint8_t vex_prefix3 = 0x00; | 164 uint8_t vex_prefix3 = 0x00; |
165 enum imm_mode imm_operand = IMMNONE; | 165 enum imm_mode imm_operand = IMMNONE; |
166 enum imm_mode imm2_operand = IMMNONE; | 166 enum imm_mode imm2_operand = IMMNONE; |
167 struct instruction instruction; | 167 struct instruction instruction; |
168 int result = TRUE; | 168 int result = TRUE; |
169 | 169 |
170 int current_state; | 170 int current_state; |
171 | 171 |
172 /* Not used in ia32_mode. */ | 172 /* Not used in ia32_mode. */ |
173 instruction.prefix.rex = 0; | 173 instruction.prefix.rex = 0; |
174 | 174 |
175 SET_DISP_TYPE(DISPNONE); | 175 SET_DISP_TYPE(DISPNONE); |
176 SET_IMM_TYPE(IMMNONE); | 176 SET_IMM_TYPE(IMMNONE); |
177 SET_IMM2_TYPE(IMMNONE); | 177 SET_IMM2_TYPE(IMMNONE); |
178 SET_DATA16_PREFIX(FALSE); | 178 SET_DATA16_PREFIX(FALSE); |
179 SET_LOCK_PREFIX(FALSE); | 179 SET_LOCK_PREFIX(FALSE); |
180 SET_REPNZ_PREFIX(FALSE); | 180 SET_REPNZ_PREFIX(FALSE); |
181 SET_REPZ_PREFIX(FALSE); | 181 SET_REPZ_PREFIX(FALSE); |
182 SET_BRANCH_NOT_TAKEN(FALSE); | 182 SET_BRANCH_NOT_TAKEN(FALSE); |
183 SET_BRANCH_TAKEN(FALSE); | 183 SET_BRANCH_TAKEN(FALSE); |
184 | 184 |
185 %% write init; | 185 %% write init; |
Brad Chen
2012/09/28 20:41:01
Can you add comments to make it obvious what these
khim
2013/03/08 17:59:53
Done.
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186 %% write exec; | 186 %% write exec; |
187 | 187 |
188 error_detected: | 188 error_detected: |
189 return result; | 189 return result; |
190 } | 190 } |
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