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Side by Side Diff: lib/CodeGen/TargetInfo.cpp

Issue 10982073: X86_64ABIInfo support for x86_64 targets with 32-bit pointers. (Closed) Base URL: http://llvm.org/git/clang.git@master
Patch Set: rebase, add comment Created 8 years, 2 months ago
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1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // These classes wrap the information about a call or function 10 // These classes wrap the information about a call or function
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1107 /// The 0.98 ABI revision clarified a lot of ambiguities, 1107 /// The 0.98 ABI revision clarified a lot of ambiguities,
1108 /// unfortunately in ways that were not always consistent with 1108 /// unfortunately in ways that were not always consistent with
1109 /// certain previous compilers. In particular, platforms which 1109 /// certain previous compilers. In particular, platforms which
1110 /// required strict binary compatibility with older versions of GCC 1110 /// required strict binary compatibility with older versions of GCC
1111 /// may need to exempt themselves. 1111 /// may need to exempt themselves.
1112 bool honorsRevision0_98() const { 1112 bool honorsRevision0_98() const {
1113 return !getContext().getTargetInfo().getTriple().isOSDarwin(); 1113 return !getContext().getTargetInfo().getTriple().isOSDarwin();
1114 } 1114 }
1115 1115
1116 bool HasAVX; 1116 bool HasAVX;
1117 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on
1118 // 64-bit hardware.
1119 bool Has64BitPointers;
1117 1120
1118 public: 1121 public:
1119 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1122 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) :
1120 ABIInfo(CGT), HasAVX(hasavx) {} 1123 ABIInfo(CGT), HasAVX(hasavx),
1124 Has64BitPointers(CGT.getDataLayout().getPointerSize() == 8) {
1125 }
1121 1126
1122 bool isPassedUsingAVXType(QualType type) const { 1127 bool isPassedUsingAVXType(QualType type) const {
1123 unsigned neededInt, neededSSE; 1128 unsigned neededInt, neededSSE;
1124 // The freeIntRegs argument doesn't matter here. 1129 // The freeIntRegs argument doesn't matter here.
1125 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE); 1130 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE);
1126 if (info.isDirect()) { 1131 if (info.isDirect()) {
1127 llvm::Type *ty = info.getCoerceToType(); 1132 llvm::Type *ty = info.getCoerceToType();
1128 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1133 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty))
1129 return (vectorTy->getBitWidth() > 128); 1134 return (vectorTy->getBitWidth() > 128);
1130 } 1135 }
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1147 1152
1148 virtual void computeInfo(CGFunctionInfo &FI) const; 1153 virtual void computeInfo(CGFunctionInfo &FI) const;
1149 1154
1150 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1155 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1151 CodeGenFunction &CGF) const; 1156 CodeGenFunction &CGF) const;
1152 }; 1157 };
1153 1158
1154 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1159 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1155 public: 1160 public:
1156 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1161 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX)
1157 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 1162 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {}
1158 1163
1159 const X86_64ABIInfo &getABIInfo() const { 1164 const X86_64ABIInfo &getABIInfo() const {
1160 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1165 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo());
1161 } 1166 }
1162 1167
1163 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1168 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
1164 return 7; 1169 return 7;
1165 } 1170 }
1166 1171
1167 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1172 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
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1343 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1348 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi);
1344 return; 1349 return;
1345 } 1350 }
1346 1351
1347 if (Ty->hasPointerRepresentation()) { 1352 if (Ty->hasPointerRepresentation()) {
1348 Current = Integer; 1353 Current = Integer;
1349 return; 1354 return;
1350 } 1355 }
1351 1356
1352 if (Ty->isMemberPointerType()) { 1357 if (Ty->isMemberPointerType()) {
1353 if (Ty->isMemberFunctionPointerType()) 1358 if (Ty->isMemberFunctionPointerType() && Has64BitPointers)
1354 Lo = Hi = Integer; 1359 Lo = Hi = Integer;
1355 else 1360 else
1356 Current = Integer; 1361 Current = Integer;
1357 return; 1362 return;
1358 } 1363 }
1359 1364
1360 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1365 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1361 uint64_t Size = getContext().getTypeSize(VT); 1366 uint64_t Size = getContext().getTypeSize(VT);
1362 if (Size == 32) { 1367 if (Size == 32) {
1363 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1368 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
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1854 /// SourceTy is the source level type for the entire argument. SourceOffset is 1859 /// SourceTy is the source level type for the entire argument. SourceOffset is
1855 /// an offset into this that we're processing (which is always either 0 or 8). 1860 /// an offset into this that we're processing (which is always either 0 or 8).
1856 /// 1861 ///
1857 llvm::Type *X86_64ABIInfo:: 1862 llvm::Type *X86_64ABIInfo::
1858 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1863 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset,
1859 QualType SourceTy, unsigned SourceOffset) const { 1864 QualType SourceTy, unsigned SourceOffset) const {
1860 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1865 // If we're dealing with an un-offset LLVM IR type, then it means that we're
1861 // returning an 8-byte unit starting with it. See if we can safely use it. 1866 // returning an 8-byte unit starting with it. See if we can safely use it.
1862 if (IROffset == 0) { 1867 if (IROffset == 0) {
1863 // Pointers and int64's always fill the 8-byte unit. 1868 // Pointers and int64's always fill the 8-byte unit.
1864 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1869 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) ||
1870 IRType->isIntegerTy(64))
1865 return IRType; 1871 return IRType;
1866 1872
1867 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1873 // If we have a 1/2/4-byte integer, we can use it only if the rest of the
1868 // goodness in the source type is just tail padding. This is allowed to 1874 // goodness in the source type is just tail padding. This is allowed to
1869 // kick in for struct {double,int} on the int, but not on 1875 // kick in for struct {double,int} on the int, but not on
1870 // struct{double,int,int} because we wouldn't return the second int. We 1876 // struct{double,int,int} because we wouldn't return the second int. We
1871 // have to do this analysis on the source type because we can't depend on 1877 // have to do this analysis on the source type because we can't depend on
1872 // unions being lowered a specific way etc. 1878 // unions being lowered a specific way etc.
1873 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1879 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
1874 IRType->isIntegerTy(32)) { 1880 IRType->isIntegerTy(32) ||
1875 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1881 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) {
1882 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 :
1883 cast<llvm::IntegerType>(IRType)->getBitWidth();
1876 1884
1877 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1885 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
1878 SourceOffset*8+64, getContext())) 1886 SourceOffset*8+64, getContext()))
1879 return IRType; 1887 return IRType;
1880 } 1888 }
1881 } 1889 }
1882 1890
1883 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1891 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1884 // If this is a struct, recurse into the field at the specified offset. 1892 // If this is a struct, recurse into the field at the specified offset.
1885 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy); 1893 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy);
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4035 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 4043 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types));
4036 default: 4044 default:
4037 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 4045 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types,
4038 HasAVX)); 4046 HasAVX));
4039 } 4047 }
4040 } 4048 }
4041 case llvm::Triple::hexagon: 4049 case llvm::Triple::hexagon:
4042 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 4050 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types));
4043 } 4051 }
4044 } 4052 }
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