Support for SDIV and MLS ARM instructions, and implement DoModI using them

src/arm/lithium-codegen-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 961 matching lines @@
     __ bind(&positive_dividend);
     __ and_(result, dividend, Operand(divisor - 1));
     __ bind(&done);
     return;
   }
 
   // These registers hold untagged 32 bit values.
   Register left = ToRegister(instr->left());
   Register right = ToRegister(instr->right());
   Register result = ToRegister(instr->result());
+#if CAN_USE_INTEGER_DIVISION

[danno, 2012/09/27 15:28:09]

Need to be a runtime check rather than a compile-time check, introduced in the
same way as VFP3 support works. 

+  // Check for x % 0.
+  if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) {
+    __ cmp(right, Operand(0));
+    DeoptimizeIf(eq, instr->environment());
+  }
 
+  Label done;
+  // For  r3 = r1 % r2; we can have the following ARM code
+  // sdiv r3, r1, r2
+  // mls r3, r3, r2, r1
+
+  __ sdiv(result, left, right);
+  __ mls(result, result, right, left);
+  __ cmp(result, Operand(0));
+  __ b(ne, &done);
+
+  if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+     __ cmp(left, Operand(0));
+     DeoptimizeIf(lt, instr->environment());
+  }
+#else
   Register scratch = scratch0();
   Register scratch2 = ToRegister(instr->temp());
   DwVfpRegister dividend = ToDoubleRegister(instr->temp2());
   DwVfpRegister divisor = ToDoubleRegister(instr->temp3());
   DwVfpRegister quotient = double_scratch0();
 
   ASSERT(!dividend.is(divisor));
   ASSERT(!dividend.is(quotient));
   ASSERT(!divisor.is(quotient));
   ASSERT(!scratch.is(left));
@@ skipping 81 matching lines @@
     Label ok;
     // Check for -0.
     __ sub(scratch2, left, scratch, SetCC);
     __ b(ne, &ok);
     __ cmp(left, Operand(0));
     DeoptimizeIf(mi, instr->environment());
     __ bind(&ok);
     // Load the result and we are done.
     __ mov(result, scratch2);
   }
-
+#endif
   __ bind(&done);
 }
 
 
 void LCodeGen::EmitSignedIntegerDivisionByConstant(

[danno, 2012/09/27 15:28:09]

Are there not cases in here that might also benefit from sdiv?

     Register result,
     Register dividend,
     int32_t divisor,
     Register remainder,
     Register scratch,
     LEnvironment* environment) {
   ASSERT(!AreAliased(dividend, scratch, ip));
   ASSERT(LChunkBuilder::HasMagicNumberForDivisor(divisor));
 
   uint32_t divisor_abs = abs(divisor);
@@ skipping 157 matching lines @@
   __ JumpIfNotSmi(result, &deoptimize);
   __ SmiUntag(result);
   __ b(&done);
 
   __ bind(&deoptimize);
   DeoptimizeIf(al, instr->environment());
   __ bind(&done);
 }
 
 
 void LCodeGen::DoMathFloorOfDiv(LMathFloorOfDiv* instr) {

[danno, 2012/09/27 15:28:09]

This could definitely benefit from sdiv, too.

   const Register result = ToRegister(instr->result());
   const Register left = ToRegister(instr->left());
   const Register remainder = ToRegister(instr->temp());
   const Register scratch = scratch0();
 
   // We only optimize this for division by constants, because the standard
   // integer division routine is usually slower than transitionning to VFP.
   // This could be optimized on processors with SDIV available.
   ASSERT(instr->right()->IsConstantOperand());
   int32_t divisor = ToInteger32(LConstantOperand::cast(instr->right()));
@@ skipping 4382 matching lines @@
   __ sub(scratch, result, Operand(index, LSL, kPointerSizeLog2 - kSmiTagSize));
   __ ldr(result, FieldMemOperand(scratch,
                                  FixedArray::kHeaderSize - kPointerSize));
   __ bind(&done);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal