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Issue 1094014: Merge the partial_snapshots branch back into bleeding_edge. For... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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40 #include "serialize.h" 40 #include "serialize.h"
41 41
42 namespace v8 { 42 namespace v8 {
43 namespace internal { 43 namespace internal {
44 44
45 // Safe default is no features. 45 // Safe default is no features.
46 unsigned CpuFeatures::supported_ = 0; 46 unsigned CpuFeatures::supported_ = 0;
47 unsigned CpuFeatures::enabled_ = 0; 47 unsigned CpuFeatures::enabled_ = 0;
48 unsigned CpuFeatures::found_by_runtime_probing_ = 0; 48 unsigned CpuFeatures::found_by_runtime_probing_ = 0;
49 49
50
51 #ifdef __arm__
52 static uint64_t CpuFeaturesImpliedByCompiler() {
53 uint64_t answer = 0;
54 #ifdef CAN_USE_ARMV7_INSTRUCTIONS
55 answer |= 1u << ARMv7;
56 #endif // def CAN_USE_ARMV7_INSTRUCTIONS
57 // If the compiler is allowed to use VFP then we can use VFP too in our code
58 // generation even when generating snapshots. This won't work for cross
59 // compilation.
60 #if defined(__VFP_FP__) && !defined(__SOFTFP__)
61 answer |= 1u << VFP3;
62 #endif // defined(__VFP_FP__) && !defined(__SOFTFP__)
63 #ifdef CAN_USE_VFP_INSTRUCTIONS
64 answer |= 1u << VFP3;
65 #endif // def CAN_USE_VFP_INSTRUCTIONS
66 return answer;
67 }
68 #endif // def __arm__
69
70
50 void CpuFeatures::Probe() { 71 void CpuFeatures::Probe() {
51 // If the compiler is allowed to use vfp then we can use vfp too in our 72 #ifndef __arm__
52 // code generation.
53 #if !defined(__arm__)
54 // For the simulator=arm build, use VFP when FLAG_enable_vfp3 is enabled. 73 // For the simulator=arm build, use VFP when FLAG_enable_vfp3 is enabled.
55 if (FLAG_enable_vfp3) { 74 if (FLAG_enable_vfp3) {
56 supported_ |= 1u << VFP3; 75 supported_ |= 1u << VFP3;
57 } 76 }
58 // For the simulator=arm build, use ARMv7 when FLAG_enable_armv7 is enabled 77 // For the simulator=arm build, use ARMv7 when FLAG_enable_armv7 is enabled
59 if (FLAG_enable_armv7) { 78 if (FLAG_enable_armv7) {
60 supported_ |= 1u << ARMv7; 79 supported_ |= 1u << ARMv7;
61 } 80 }
62 #else 81 #else // def __arm__
63 if (Serializer::enabled()) { 82 if (Serializer::enabled()) {
64 supported_ |= OS::CpuFeaturesImpliedByPlatform(); 83 supported_ |= OS::CpuFeaturesImpliedByPlatform();
84 supported_ |= CpuFeaturesImpliedByCompiler();
65 return; // No features if we might serialize. 85 return; // No features if we might serialize.
66 } 86 }
67 87
68 if (OS::ArmCpuHasFeature(VFP3)) { 88 if (OS::ArmCpuHasFeature(VFP3)) {
69 // This implementation also sets the VFP flags if 89 // This implementation also sets the VFP flags if
70 // runtime detection of VFP returns true. 90 // runtime detection of VFP returns true.
71 supported_ |= 1u << VFP3; 91 supported_ |= 1u << VFP3;
72 found_by_runtime_probing_ |= 1u << VFP3; 92 found_by_runtime_probing_ |= 1u << VFP3;
73 } 93 }
74 94
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525 // We have to use the temporary register for things that can be relocated even 545 // We have to use the temporary register for things that can be relocated even
526 // if they can be encoded in the ARM's 12 bits of immediate-offset instruction 546 // if they can be encoded in the ARM's 12 bits of immediate-offset instruction
527 // space. There is no guarantee that the relocated location can be similarly 547 // space. There is no guarantee that the relocated location can be similarly
528 // encoded. 548 // encoded.
529 static bool MustUseIp(RelocInfo::Mode rmode) { 549 static bool MustUseIp(RelocInfo::Mode rmode) {
530 if (rmode == RelocInfo::EXTERNAL_REFERENCE) { 550 if (rmode == RelocInfo::EXTERNAL_REFERENCE) {
531 #ifdef DEBUG 551 #ifdef DEBUG
532 if (!Serializer::enabled()) { 552 if (!Serializer::enabled()) {
533 Serializer::TooLateToEnableNow(); 553 Serializer::TooLateToEnableNow();
534 } 554 }
535 #endif 555 #endif // def DEBUG
536 return Serializer::enabled(); 556 return Serializer::enabled();
537 } else if (rmode == RelocInfo::NONE) { 557 } else if (rmode == RelocInfo::NONE) {
538 return false; 558 return false;
539 } 559 }
540 return true; 560 return true;
541 } 561 }
542 562
543 563
544 void Assembler::addrmod1(Instr instr, 564 void Assembler::addrmod1(Instr instr,
545 Register rn, 565 Register rn,
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1130 Condition cond) { 1150 Condition cond) {
1131 ASSERT(!dst.is(pc) && !src.is(pc) && !base.is(pc)); 1151 ASSERT(!dst.is(pc) && !src.is(pc) && !base.is(pc));
1132 ASSERT(!dst.is(base) && !src.is(base)); 1152 ASSERT(!dst.is(base) && !src.is(base));
1133 emit(cond | P | B | base.code()*B16 | dst.code()*B12 | 1153 emit(cond | P | B | base.code()*B16 | dst.code()*B12 |
1134 B7 | B4 | src.code()); 1154 B7 | B4 | src.code());
1135 } 1155 }
1136 1156
1137 1157
1138 // Exception-generating instructions and debugging support. 1158 // Exception-generating instructions and debugging support.
1139 void Assembler::stop(const char* msg) { 1159 void Assembler::stop(const char* msg) {
1140 #if !defined(__arm__) 1160 #ifndef __arm__
1141 // The simulator handles these special instructions and stops execution. 1161 // The simulator handles these special instructions and stops execution.
1142 emit(15 << 28 | ((intptr_t) msg)); 1162 emit(15 << 28 | ((intptr_t) msg));
1143 #else 1163 #else // def __arm__
1144 // Just issue a simple break instruction for now. Alternatively we could use 1164 #ifdef CAN_USE_ARMV5_INSTRUCTIONS
1145 // the swi(0x9f0001) instruction on Linux.
1146 bkpt(0); 1165 bkpt(0);
1147 #endif 1166 #else // ndef CAN_USE_ARMV5_INSTRUCTIONS
1167 swi(0x9f0001);
1168 #endif // ndef CAN_USE_ARMV5_INSTRUCTIONS
1169 #endif // def __arm__
1148 } 1170 }
1149 1171
1150 1172
1151 void Assembler::bkpt(uint32_t imm16) { // v5 and above 1173 void Assembler::bkpt(uint32_t imm16) { // v5 and above
1152 ASSERT(is_uint16(imm16)); 1174 ASSERT(is_uint16(imm16));
1153 emit(al | B24 | B21 | (imm16 >> 4)*B8 | 7*B4 | (imm16 & 0xf)); 1175 emit(al | B24 | B21 | (imm16 >> 4)*B8 | 7*B4 | (imm16 & 0xf));
1154 } 1176 }
1155 1177
1156 1178
1157 void Assembler::swi(uint32_t imm24, Condition cond) { 1179 void Assembler::swi(uint32_t imm24, Condition cond) {
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1781 bind(&after_pool); 1803 bind(&after_pool);
1782 } 1804 }
1783 1805
1784 // Since a constant pool was just emitted, move the check offset forward by 1806 // Since a constant pool was just emitted, move the check offset forward by
1785 // the standard interval. 1807 // the standard interval.
1786 next_buffer_check_ = pc_offset() + kCheckConstInterval; 1808 next_buffer_check_ = pc_offset() + kCheckConstInterval;
1787 } 1809 }
1788 1810
1789 1811
1790 } } // namespace v8::internal 1812 } } // namespace v8::internal
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