[MIPS] Implementation of sel_ldr for MIPS architecture.

src/include/concurrency_ops.h

Index: src/include/concurrency_ops.h
diff --git a/src/include/concurrency_ops.h b/src/include/concurrency_ops.h
index 80f57835397dde3f6a4d91fc0f8d14a88d6c9a93..eb68bf24ca7fb89b4e8750c5a9ae506764925d60 100644
--- a/src/include/concurrency_ops.h
+++ b/src/include/concurrency_ops.h
@@ -36,6 +36,12 @@ static INLINE void NaClWriteMemoryBarrier() {
    */
 }
 
+#elif NACL_ARCH(NACL_BUILD_ARCH) == NACL_mips
+
+static INLINE void NaClWriteMemoryBarrier() {
+  __asm__ __volatile__("sync" : : : "memory");
+}
+
 #else
 
 #error "Define for other architectures"