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Side by Side Diff: src/include/elf_constants.h

Issue 10919162: [MIPS] Implementation of sel_ldr for MIPS architecture. (Closed) Base URL: http://src.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 3 months ago
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1 /* 1 /*
2 * Copyright 2008, Google Inc. 2 * Copyright 2008, Google Inc.
3 * All rights reserved. 3 * All rights reserved.
4 * 4 *
5 * Redistribution and use in source and binary forms, with or without 5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are 6 * modification, are permitted provided that the following conditions are
7 * met: 7 * met:
8 * 8 *
9 * * Redistributions of source code must retain the above copyright 9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
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61 #define ET_LOPROC 0xff00 /* processor-specific */ 61 #define ET_LOPROC 0xff00 /* processor-specific */
62 #define ET_HIPROC 0xffff /* processor-specific */ 62 #define ET_HIPROC 0xffff /* processor-specific */
63 63
64 #define EM_NONE 0 /* no machine */ 64 #define EM_NONE 0 /* no machine */
65 #define EM_M32 1 /* at&t we 32100 */ 65 #define EM_M32 1 /* at&t we 32100 */
66 #define EM_SPARC 2 /* sparc */ 66 #define EM_SPARC 2 /* sparc */
67 #define EM_386 3 /* intel architecture */ 67 #define EM_386 3 /* intel architecture */
68 #define EM_68K 4 /* motorola 68000 */ 68 #define EM_68K 4 /* motorola 68000 */
69 #define EM_88K 5 /* motorola 88000 */ 69 #define EM_88K 5 /* motorola 88000 */
70 #define EM_860 7 /* intel 80860 */ 70 #define EM_860 7 /* intel 80860 */
71 #define EM_MIPS 9 /* mips rs3000 big-endian */ 71 #define EM_MIPS 8 /* mips rs3000 big-endian */
Mark Seaborn 2012/09/08 02:43:14 NaCl is little endian and in SConstruct you are as
petarj 2012/09/11 16:58:13 Yes, the comment is misleading. I have removed "bi
72 #define EM_MIPS_RS4_BE 10 /* mips rs4000 big-endian */ 72 #define EM_MIPS_RS4_BE 10 /* mips rs4000 big-endian */
73 #define EM_LORESERVED 11 73 #define EM_LORESERVED 11
74 #define EM_HIRESERVED 16 74 #define EM_HIRESERVED 16
75 #define EM_ARM 40 /* arm */ 75 #define EM_ARM 40 /* arm */
76 #define EM_X86_64 62 /* x86-64 */ 76 #define EM_X86_64 62 /* x86-64 */
77 77
78 #define EV_NONE 0 /* invalid version */ 78 #define EV_NONE 0 /* invalid version */
79 #define EV_CURRENT 1 /* current version */ 79 #define EV_CURRENT 1 /* current version */
80 80
81 #define EI_MAG0 0 /* file identification */ 81 #define EI_MAG0 0 /* file identification */
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147 147
148 #define SHF_WRITE 0x1 /* Has writable data */ 148 #define SHF_WRITE 0x1 /* Has writable data */
149 #define SHF_ALLOC 0x2 /* Allocated in memory image of program */ 149 #define SHF_ALLOC 0x2 /* Allocated in memory image of program */
150 #define SHF_EXECINSTR 0x4 /* Contains executable instructions */ 150 #define SHF_EXECINSTR 0x4 /* Contains executable instructions */
151 #define SHF_MASKOS 0x0f000000 /* Environment-specific use */ 151 #define SHF_MASKOS 0x0f000000 /* Environment-specific use */
152 #define SHF_MASKPROC 0xf0000000 /* Processor-specific use */ 152 #define SHF_MASKPROC 0xf0000000 /* Processor-specific use */
153 153
154 EXTERN_C_END 154 EXTERN_C_END
155 155
156 #endif /* NATIVE_CLIENT_SRC_INCLUDE_ELF_CONSTANTS_H_ */ 156 #endif /* NATIVE_CLIENT_SRC_INCLUDE_ELF_CONSTANTS_H_ */
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