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Side by Side Diff: src/arm/assembler-arm.h

Issue 10829169: Refactor Math.min/max to be a single HInstruction. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 4 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1129 void vcmp(const DwVfpRegister src1, 1129 void vcmp(const DwVfpRegister src1,
1130 const double src2, 1130 const double src2,
1131 const Condition cond = al); 1131 const Condition cond = al);
1132 void vmrs(const Register dst, 1132 void vmrs(const Register dst,
1133 const Condition cond = al); 1133 const Condition cond = al);
1134 void vmsr(const Register dst, 1134 void vmsr(const Register dst,
1135 const Condition cond = al); 1135 const Condition cond = al);
1136 void vsqrt(const DwVfpRegister dst, 1136 void vsqrt(const DwVfpRegister dst,
1137 const DwVfpRegister src, 1137 const DwVfpRegister src,
1138 const Condition cond = al); 1138 const Condition cond = al);
1139 void vorr(const DwVfpRegister dst,
1140 const DwVfpRegister src1,
1141 const DwVfpRegister src2);
1139 1142
1140 // Pseudo instructions 1143 // Pseudo instructions
1141 1144
1142 // Different nop operations are used by the code generator to detect certain 1145 // Different nop operations are used by the code generator to detect certain
1143 // states of the generated code. 1146 // states of the generated code.
1144 enum NopMarkerTypes { 1147 enum NopMarkerTypes {
1145 NON_MARKING_NOP = 0, 1148 NON_MARKING_NOP = 0,
1146 DEBUG_BREAK_NOP, 1149 DEBUG_BREAK_NOP,
1147 // IC markers. 1150 // IC markers.
1148 PROPERTY_ACCESS_INLINED, 1151 PROPERTY_ACCESS_INLINED,
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1460 public: 1463 public:
1461 explicit EnsureSpace(Assembler* assembler) { 1464 explicit EnsureSpace(Assembler* assembler) {
1462 assembler->CheckBuffer(); 1465 assembler->CheckBuffer();
1463 } 1466 }
1464 }; 1467 };
1465 1468
1466 1469
1467 } } // namespace v8::internal 1470 } } // namespace v8::internal
1468 1471
1469 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1472 #endif // V8_ARM_ASSEMBLER_ARM_H_
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