Add tzcnt as an acceptable instruction to the x86-32 validator (it already

src/trusted/validator/x86/ncval_seg_sfi/generator/ncdecode_table.c

Index: src/trusted/validator/x86/ncval_seg_sfi/generator/ncdecode_table.c
===================================================================
--- src/trusted/validator/x86/ncval_seg_sfi/generator/ncdecode_table.c	(revision 9237)
+++ src/trusted/validator/x86/ncval_seg_sfi/generator/ncdecode_table.c	(working copy)
@@ -2168,12 +2168,19 @@
   EncodeOpF20F(0xbb, 0, IMM_NONE, NACLi_INVALID, "reserved");
 
   EncodeOp0F(0xbc, 1, IMM_NONE, NACLi_386, "bsf $Gv, $Ev");
-  EncodeOpF30F(0xbc, 0, IMM_NONE, NACLi_INVALID, "reserved");
+  /* tzcnt is treated as a bsf on machines that don't have tzcnt.
+   * Hence, even though its conditional on NACLi_LZCNT, we act
+   * like it can be used on all processors.
+   */
+  EncodeOpF30F(0xbc, 1, IMM_NONE, NACLi_386, "tzcnt $Gv, $Ev");

[Karl, 2012/07/24 21:15:45]

Followed Roland's advice and made it work for all processors.

   EncodeOpF20F(0xbc, 0, IMM_NONE, NACLi_INVALID, "reserved");
 
   EncodeOp0F(0xbd, 1, IMM_NONE, NACLi_386, "bsr $Gv, $Ev");
-  /* lzcnt is treated as a bsr on machines that don't have lzcnt */
-  EncodeOpF30F(0xbd, 1, IMM_NONE, NACLi_LZCNT, "lzcnt $Gv, $Ev");
+  /* lzcnt is treated as a bsr on machines that don't have lzcnt.
+   * Hence, even though its conditional on NACLi_LZCNT, we act
+   * like it can be used on all processors.
+   */
+  EncodeOpF30F(0xbd, 1, IMM_NONE, NACLi_386, "lzcnt $Gv, $Ev");

[Karl, 2012/07/24 21:15:45]

Did the same for lzcnt.

   EncodeOpF20F(0xbd, 0, IMM_NONE, NACLi_INVALID, "reserved");
 
   EncodeOp0F(0xbe, 1, IMM_NONE, NACLi_386, "movsx $Gv, $Eb");