Fix cases where fast instruction selection generated both base and index registers

llvm/lib/Target/X86/X86NaClRewritePass.cpp

 //=== X86NaClRewritePAss.cpp - Rewrite instructions for NaCl SFI --*- C++ -*-=//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains a pass that ensures stores and loads and stack/frame
@@ skipping 518 matching lines @@
 
   if (AbsoluteBase && AbsoluteIndex) {
     llvm_unreachable("Unexpected absolute register pair");
   } else if (AbsoluteBase) {
     AddrReg = IndexReg.getReg();
   } else if (AbsoluteIndex) {
     assert(!BaseReg.getReg() && "Unexpected base register");
     assert(Scale.getImm() == 1);
     AddrReg = 0;
   } else {
-    assert(!BaseReg.getReg() && "Unexpected relative register pair");
-    BaseReg.setReg(UseZeroBasedSandbox ? 0 : X86::R15);
-    AddrReg = IndexReg.getReg();
+    // @LOCALMOD-START

[Derek Schuff, 2012/07/24 21:07:47]

no need for LOCALMODs here, this entire file is a local mod

[Karl, 2012/07/24 22:05:30]

Done.

+    if (!BaseReg.getReg()) {
+      // No base, fill in relative.
+      BaseReg.setReg(UseZeroBasedSandbox ? 0 : X86::R15);
+      AddrReg = IndexReg.getReg();
+    } else if (!UseZeroBasedSandbox) {
+      // Switch base and index registers if index register is undefined.
+      // That is do conversions like "mov d(%r,0,0) -> mov d(%r15, %r, 1)".
+      assert (!IndexReg.getReg()
+              && "Unexpected index and base register");
+      IndexReg.setReg(BaseReg.getReg());
+      Scale.setImm(1);
+      BaseReg.setReg(X86::R15);
+      AddrReg = IndexReg.getReg();
+    }

[jvoung - send to chromium..., 2012/07/24 21:08:35]

} else {
  // Original behavior the zero-based sandbox?
} 

Or is that impossible (covered by the "if (!BaseReg.getReg())" ) ?

If it's impossible, can you put an llvm_unreachable("some error message"); ?

[Karl, 2012/07/24 22:05:30]

Done.

+    // @LOCALMOD-END
   }
 
   if (AddrReg) {
     assert(!SegmentReg.getReg() && "Unexpected segment register");
     SegmentReg.setReg(X86::PSEUDO_NACL_SEG);
     return true;
   }
 
   return false;
 }
@@ skipping 319 matching lines @@
   }
   dbgs() << "\n";
 }
 
 /// createX86NaClRewritePassPass - returns an instance of the pass.
 namespace llvm {
   FunctionPass* createX86NaClRewritePass() {
     return new X86NaClRewritePass();
   }
 }